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83 lines
3.4 KiB
83 lines
3.4 KiB
From f2a15dd668913c5a1388ba7e1131b25162b2ea75 Mon Sep 17 00:00:00 2001 |
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From: Anton Blanchard <anton@ozlabs.org> |
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Date: Tue, 27 Jul 2021 15:47:50 +1000 |
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Subject: powerpc64: Check cacheline size before using optimised memset |
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routines |
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A number of optimised memset routines assume the cacheline size is 128B, |
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so we better check before using them. |
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Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com> |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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index 32564c8f1f..a3fdcd43bd 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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@@ -35,6 +35,9 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, |
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unsigned long int hwcap = GLRO(dl_hwcap); |
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unsigned long int hwcap2 = GLRO(dl_hwcap2); |
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+#ifdef SHARED |
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+ int cacheline_size = GLRO(dl_cache_line_size); |
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+#endif |
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/* hwcap contains only the latest supported ISA, the code checks which is |
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and fills the previous supported ones. */ |
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@@ -90,16 +93,21 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, |
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IFUNC_IMPL_ADD (array, i, memset, |
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hwcap2 & PPC_FEATURE2_ARCH_3_1 |
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&& hwcap2 & PPC_FEATURE2_HAS_ISEL |
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- && hwcap & PPC_FEATURE_HAS_VSX, |
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+ && hwcap & PPC_FEATURE_HAS_VSX |
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+ && cacheline_size == 128, |
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__memset_power10) |
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#endif |
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- IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07, |
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+ IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07 |
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+ && cacheline_size == 128, |
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__memset_power8) |
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- IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06, |
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+ IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06 |
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+ && cacheline_size == 128, |
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__memset_power7) |
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- IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_05, |
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+ IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_05 |
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+ && cacheline_size == 128, |
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__memset_power6) |
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- IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_POWER4, |
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+ IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_POWER4 |
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+ && cacheline_size == 128, |
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__memset_power4) |
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IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ppc)) |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/memset.c b/sysdeps/powerpc/powerpc64/multiarch/memset.c |
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index c1aa143f60..056e911699 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/memset.c |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/memset.c |
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@@ -43,16 +43,21 @@ libc_ifunc (__libc_memset, |
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# ifdef __LITTLE_ENDIAN__ |
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(hwcap2 & PPC_FEATURE2_ARCH_3_1 |
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&& hwcap2 & PPC_FEATURE2_HAS_ISEL |
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- && hwcap & PPC_FEATURE_HAS_VSX) |
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+ && hwcap & PPC_FEATURE_HAS_VSX |
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+ && GLRO(dl_cache_line_size) == 128) |
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? __memset_power10 : |
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# endif |
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- (hwcap2 & PPC_FEATURE2_ARCH_2_07) |
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+ (hwcap2 & PPC_FEATURE2_ARCH_2_07 |
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+ && GLRO(dl_cache_line_size) == 128) |
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? __memset_power8 : |
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- (hwcap & PPC_FEATURE_ARCH_2_06) |
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+ (hwcap & PPC_FEATURE_ARCH_2_06 |
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+ && GLRO(dl_cache_line_size) == 128) |
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? __memset_power7 : |
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- (hwcap & PPC_FEATURE_ARCH_2_05) |
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+ (hwcap & PPC_FEATURE_ARCH_2_05 |
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+ && GLRO(dl_cache_line_size) == 128) |
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? __memset_power6 : |
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- (hwcap & PPC_FEATURE_POWER4) |
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+ (hwcap & PPC_FEATURE_POWER4 |
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+ && GLRO(dl_cache_line_size) == 128) |
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? __memset_power4 |
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: __memset_ppc); |
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