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initial package creation 

Signed-off-by: Toshaan Bharvani <toshaan@powerel.org>
master
Toshaan Bharvani 4 months ago
parent
29f779b700
commit
e7b9706c43
15 changed files with 2715 additions and 289 deletions
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  1. 155
      SOURCES/binutils-CIE-generation.patch
  2. 34
      SOURCES/binutils-CVE-2023-25587.patch
  3. 152
      SOURCES/binutils-aarch64-flagm.patch
  4. 53
      SOURCES/binutils-aarch64-rng.patch
  5. 11
      SOURCES/binutils-autoconf-version.patch
  6. 17
      SOURCES/binutils-increase-the-max-number-of-open-fi.patch
  7. 59
      SOURCES/binutils-ld-ir-plugin.patch
  8. 17
      SOURCES/binutils-memory-access-when-parsing-an-elf-file.patch
  9. 30
      SOURCES/binutils-no-comment-in-bfd-stdint.patch
  10. 51
      SOURCES/binutils-s390-z16.patch
  11. 143
      SOURCES/binutils-s390x-static-PIE.patch
  12. 15
      SOURCES/binutils-undefined-ref-to-sym.patch
  13. 1299
      SOURCES/binutils.gold.dwarf-5-support.patch
  14. 28
      SOURCES/gcc12-libtool-no-rpath.patch
  15. 940
      SPECS/binutils.spec

155
SOURCES/binutils-CIE-generation.patch
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@ -0,0 +1,155 @@ @@ -0,0 +1,155 @@
--- binutils.orig/gas/dw2gencfi.c 2022-09-08 13:54:05.539276706 +0100
+++ binutils-2.35.2/gas/dw2gencfi.c 2022-09-08 14:05:56.128016840 +0100
@@ -2054,6 +2054,64 @@ output_fde (struct fde_entry *fde, struc
symbol_set_value_now (end_address);
}
+/* Allow these insns to be put in the initial sequence of a CIE.
+ If J is non-NULL, then compare I and J insns for a match. */
+
+static inline bfd_boolean
+initial_cie_insn (const struct cfi_insn_data *i, const struct cfi_insn_data *j)
+{
+ if (j && i->insn != j->insn)
+ return FALSE;
+
+ switch (i->insn)
+ {
+ case DW_CFA_offset:
+ case DW_CFA_def_cfa:
+ case DW_CFA_val_offset:
+ if (j)
+ {
+ if (i->u.ri.reg != j->u.ri.reg)
+ return FALSE;
+ if (i->u.ri.offset != j->u.ri.offset)
+ return FALSE;
+ }
+ break;
+
+ case DW_CFA_register:
+ if (j)
+ {
+ if (i->u.rr.reg1 != j->u.rr.reg1)
+ return FALSE;
+ if (i->u.rr.reg2 != j->u.rr.reg2)
+ return FALSE;
+ }
+ break;
+
+ case DW_CFA_def_cfa_register:
+ case DW_CFA_restore:
+ case DW_CFA_undefined:
+ case DW_CFA_same_value:
+ if (j)
+ {
+ if (i->u.r != j->u.r)
+ return FALSE;
+ }
+ break;
+
+ case DW_CFA_def_cfa_offset:
+ if (j)
+ {
+ if (i->u.i != j->u.i)
+ return FALSE;
+ }
+ break;
+
+ default:
+ return FALSE;
+ }
+ return TRUE;
+}
+
static struct cie_entry *
select_cie_for_fde (struct fde_entry *fde, bfd_boolean eh_frame,
struct cfi_insn_data **pfirst, int align)
@@ -2099,71 +2157,15 @@ select_cie_for_fde (struct fde_entry *fd
i != cie->last && j != NULL;
i = i->next, j = j->next)
{
- if (i->insn != j->insn)
- goto fail;
- switch (i->insn)
- {
- case DW_CFA_advance_loc:
- case DW_CFA_remember_state:
- /* We reached the first advance/remember in the FDE,
- but did not reach the end of the CIE list. */
- goto fail;
-
- case DW_CFA_offset:
- case DW_CFA_def_cfa:
- if (i->u.ri.reg != j->u.ri.reg)
- goto fail;
- if (i->u.ri.offset != j->u.ri.offset)
- goto fail;
- break;
-
- case DW_CFA_register:
- if (i->u.rr.reg1 != j->u.rr.reg1)
- goto fail;
- if (i->u.rr.reg2 != j->u.rr.reg2)
- goto fail;
- break;
-
- case DW_CFA_def_cfa_register:
- case DW_CFA_restore:
- case DW_CFA_undefined:
- case DW_CFA_same_value:
- if (i->u.r != j->u.r)
- goto fail;
- break;
-
- case DW_CFA_def_cfa_offset:
- if (i->u.i != j->u.i)
- goto fail;
- break;
-
- case CFI_escape:
- case CFI_val_encoded_addr:
- case CFI_label:
- /* Don't bother matching these for now. */
- goto fail;
-
- default:
- abort ();
- }
+ if (!initial_cie_insn (i, j))
+ break;
}
- /* Success if we reached the end of the CIE list, and we've either
- run out of FDE entries or we've encountered an advance,
- remember, or escape. */
- if (i == cie->last
- && (!j
- || j->insn == DW_CFA_advance_loc
- || j->insn == DW_CFA_remember_state
- || j->insn == CFI_escape
- || j->insn == CFI_val_encoded_addr
- || j->insn == CFI_label))
+ if (i == cie->last)
{
*pfirst = j;
return cie;
}
-
- fail:;
}
cie = XNEW (struct cie_entry);
@@ -2181,11 +2183,7 @@ select_cie_for_fde (struct fde_entry *fd
#endif
for (i = cie->first; i ; i = i->next)
- if (i->insn == DW_CFA_advance_loc
- || i->insn == DW_CFA_remember_state
- || i->insn == CFI_escape
- || i->insn == CFI_val_encoded_addr
- || i->insn == CFI_label)
+ if (!initial_cie_insn (i, NULL))
break;
cie->last = i;

34
SOURCES/binutils-CVE-2023-25587.patch
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@ -0,0 +1,34 @@ @@ -0,0 +1,34 @@
--- binutils.orig/binutils/objdump.c 2023-03-03 11:37:39.209614222 +0000
+++ binutils-2.35.2/binutils/objdump.c 2023-03-03 11:39:45.492428807 +0000
@@ -1090,20 +1090,19 @@ compare_symbols (const void *ap, const v
return 1;
}
- if (bfd_get_flavour (bfd_asymbol_bfd (a)) == bfd_target_elf_flavour
+ /* Sort larger size ELF symbols before smaller. See PR20337. */
+ bfd_vma asz = 0;
+ if ((a->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0
+ && bfd_get_flavour (bfd_asymbol_bfd (a)) == bfd_target_elf_flavour)
+ asz = ((elf_symbol_type *) a)->internal_elf_sym.st_size;
+
+ bfd_vma bsz = 0;
+ if ((b->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0
&& bfd_get_flavour (bfd_asymbol_bfd (b)) == bfd_target_elf_flavour)
- {
- bfd_vma asz, bsz;
+ bsz = ((elf_symbol_type *) b)->internal_elf_sym.st_size;
- asz = 0;
- if ((a->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0)
- asz = ((elf_symbol_type *) a)->internal_elf_sym.st_size;
- bsz = 0;
- if ((b->flags & (BSF_SECTION_SYM | BSF_SYNTHETIC)) == 0)
- bsz = ((elf_symbol_type *) b)->internal_elf_sym.st_size;
- if (asz != bsz)
- return asz > bsz ? -1 : 1;
- }
+ if (asz != bsz)
+ return asz > bsz ? -1 : 1;
/* Symbols that start with '.' might be section names, so sort them
after symbols that don't start with '.'. */

152
SOURCES/binutils-aarch64-flagm.patch
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@ -0,0 +1,152 @@ @@ -0,0 +1,152 @@
diff -rup binutils.orig/gas/NEWS binutils-2.35.2/gas/NEWS
--- binutils.orig/gas/NEWS 2023-04-26 11:29:49.525097847 +0100
+++ binutils-2.35.2/gas/NEWS 2023-04-26 11:30:59.811955065 +0100
@@ -1,5 +1,7 @@
-*- text -*-
+* Add support for +flagm feature for -march in Armv8.4 AArch64.
+
* Add support for Intel AMX instructions.
* Add {disp16} pseudo prefix to x86 assembler.
diff -rup binutils.orig/gas/config/tc-aarch64.c binutils-2.35.2/gas/config/tc-aarch64.c
--- binutils.orig/gas/config/tc-aarch64.c 2023-04-26 11:29:48.944099025 +0100
+++ binutils-2.35.2/gas/config/tc-aarch64.c 2023-04-26 11:31:42.994864009 +0100
@@ -9080,6 +9080,8 @@ static const struct aarch64_option_cpu_v
AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0)},
{"f64mm", AARCH64_FEATURE (AARCH64_FEATURE_F64MM, 0),
AARCH64_FEATURE (AARCH64_FEATURE_SVE, 0)},
+ {"flagm", AARCH64_FEATURE (AARCH64_FEATURE_FLAGM, 0),
+ AARCH64_ARCH_NONE},
{NULL, AARCH64_ARCH_NONE, AARCH64_ARCH_NONE},
};
diff -rup binutils.orig/gas/doc/c-aarch64.texi binutils-2.35.2/gas/doc/c-aarch64.texi
--- binutils.orig/gas/doc/c-aarch64.texi 2023-04-26 11:29:48.881099153 +0100
+++ binutils-2.35.2/gas/doc/c-aarch64.texi 2023-04-26 11:32:22.402780914 +0100
@@ -222,6 +222,8 @@ automatically cause those extensions to
@code{pmullt} and @code{pmullb} instructions.
@item @code{sve2-sha3} @tab ARMv8-A @tab No
@tab Enable SVE2 SHA3 Extension.
+@item @code{flagm} @tab ARMv8-A @tab ARMv8.4-A or later
+ @tab Enable Flag Manipulation instructions.
@end multitable
@node AArch64 Syntax
diff -rup binutils.orig/include/opcode/aarch64.h binutils-2.35.2/include/opcode/aarch64.h
--- binutils.orig/include/opcode/aarch64.h 2023-04-26 11:29:48.702099517 +0100
+++ binutils-2.35.2/include/opcode/aarch64.h 2023-04-26 11:35:17.346412224 +0100
@@ -69,7 +69,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_AES (1ULL << 35) /* AES instructions. */
#define AARCH64_FEATURE_F16_FML (1ULL << 36) /* v8.2 FP16FML ins. */
#define AARCH64_FEATURE_V8_5 (1ULL << 37) /* ARMv8.5 processors. */
-#define AARCH64_FEATURE_FLAGMANIP (1ULL << 38) /* Flag Manipulation insns. */
+#define AARCH64_FEATURE_FLAGMANIP (1ULL << 38) /* v8.5 Flag Manipulation version 2. */
#define AARCH64_FEATURE_FRINTTS (1ULL << 39) /* FRINT[32,64][Z,X] insns. */
#define AARCH64_FEATURE_SB (1ULL << 40) /* SB instruction. */
#define AARCH64_FEATURE_PREDRES (1ULL << 41) /* Execution and Data Prediction Restriction instructions. */
@@ -84,6 +84,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_I8MM (1ULL << 52) /* Matrix Multiply instructions. */
#define AARCH64_FEATURE_F32MM (1ULL << 53)
#define AARCH64_FEATURE_F64MM (1ULL << 54)
+#define AARCH64_FEATURE_FLAGM (1ULL << 55) /* v8.4 Flag Manipulation. */
/* Crypto instructions are the combination of AES and SHA2. */
#define AARCH64_FEATURE_CRYPTO (AARCH64_FEATURE_SHA2 | AARCH64_FEATURE_AES)
@@ -109,6 +110,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_ARCH_V8_4 AARCH64_FEATURE (AARCH64_ARCH_V8_3, \
AARCH64_FEATURE_V8_4 \
| AARCH64_FEATURE_DOTPROD \
+ | AARCH64_FEATURE_FLAGM \
| AARCH64_FEATURE_F16_FML)
#define AARCH64_ARCH_V8_5 AARCH64_FEATURE (AARCH64_ARCH_V8_4, \
AARCH64_FEATURE_V8_5 \
diff -rup binutils.orig/opcodes/aarch64-tbl.h binutils-2.35.2/opcodes/aarch64-tbl.h
--- binutils.orig/opcodes/aarch64-tbl.h 2023-04-26 11:29:48.705099511 +0100
+++ binutils-2.35.2/opcodes/aarch64-tbl.h 2023-04-26 11:37:27.299161621 +0100
@@ -2406,6 +2406,8 @@ static const aarch64_feature_set aarch64
static const aarch64_feature_set aarch64_feature_f64mm_sve =
AARCH64_FEATURE (AARCH64_FEATURE_V8_2 | AARCH64_FEATURE_F64MM
| AARCH64_FEATURE_SVE, 0);
+static const aarch64_feature_set aarch64_feature_flagm =
+ AARCH64_FEATURE (AARCH64_FEATURE_FLAGM, 0);
#define CORE &aarch64_feature_v8
@@ -2450,6 +2452,7 @@ static const aarch64_feature_set aarch64
#define F32MM_SVE &aarch64_feature_f32mm_sve
#define F64MM_SVE &aarch64_feature_f64mm_sve
#define I8MM &aarch64_feature_i8mm
+#define FLAGM &aarch64_feature_flagm
#define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
{ NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }
@@ -2553,6 +2556,8 @@ static const aarch64_feature_set aarch64
{ NAME, OPCODE, MASK, CLASS, 0, F64MM_SVE, OPS, QUALS, FLAGS, CONSTRAINTS, TIED, NULL }
#define F32MATMUL_SVE_INSNC(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS, CONSTRAINTS, TIED) \
{ NAME, OPCODE, MASK, CLASS, 0, F32MM_SVE, OPS, QUALS, FLAGS, CONSTRAINTS, TIED, NULL }
+#define FLAGM_INSN(NAME,OPCODE,MASK,CLASS,OPS,QUALS,FLAGS) \
+ { NAME, OPCODE, MASK, CLASS, 0, FLAGM, OPS, QUALS, FLAGS, 0, 0, NULL }
struct aarch64_opcode aarch64_opcode_table[] =
{
@@ -3865,7 +3870,7 @@ struct aarch64_opcode aarch64_opcode_tab
potentially alias with too many instructions and so the tree can't be constructed. As a work
around we just place cfinv before msr. This means the order between these two shouldn't be
changed. */
- V8_4_INSN ("cfinv", 0xd500401f, 0xffffffff, ic_system, OP0 (), {}, 0),
+ FLAGM_INSN ("cfinv", 0xd500401f, 0xffffffff, ic_system, OP0 (), {}, 0),
CORE_INSN ("msr", 0xd5000000, 0xffe00000, ic_system, 0, OP2 (SYSREG, Rt), QL_SRC_X, F_SYS_WRITE),
CORE_INSN ("sysl",0xd5280000, 0xfff80000, ic_system, 0, OP5 (Rt, UIMM3_OP1, CRn, CRm, UIMM3_OP2), QL_SYSL, 0),
CORE_INSN ("mrs", 0xd5200000, 0xffe00000, ic_system, 0, OP2 (Rt, SYSREG), QL_DST_X, F_SYS_READ),
@@ -5043,9 +5048,9 @@ struct aarch64_opcode aarch64_opcode_tab
FP16_V8_2_INSN ("fmlal2", 0x6f808000, 0xffc0f400, asimdelem, OP3 (Vd, Vn, Em16), QL_V2FML4S, 0),
FP16_V8_2_INSN ("fmlsl2", 0x6f80c000, 0xffc0f400, asimdelem, OP3 (Vd, Vn, Em16), QL_V2FML4S, 0),
/* System extensions ARMv8.4-a. */
- V8_4_INSN ("rmif", 0xba000400, 0xffe07c10, ic_system, OP3 (Rn, IMM_2, MASK), QL_RMIF, 0),
- V8_4_INSN ("setf8", 0x3a00080d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
- V8_4_INSN ("setf16", 0x3a00480d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
+ FLAGM_INSN ("rmif", 0xba000400, 0xffe07c10, ic_system, OP3 (Rn, IMM_2, MASK), QL_RMIF, 0),
+ FLAGM_INSN ("setf8", 0x3a00080d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
+ FLAGM_INSN ("setf16", 0x3a00480d, 0xfffffc1f, ic_system, OP1 (Rn), QL_SETF, 0),
/* Memory access instructions ARMv8.4-a. */
V8_4_INSN ("stlurb" , 0x19000000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
V8_4_INSN ("ldapurb", 0x19400000, 0xffe00c00, ldst_unscaled, OP2 (Rt, ADDR_OFFSET), QL_STLW, 0),
--- /dev/null 2023-04-26 09:16:03.694889721 +0100
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/flagm.d 2023-04-26 11:33:08.910682842 +0100
@@ -0,0 +1,16 @@
+#name: FLAGM (Condition flag manipulation) feature
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: d500401f cfinv
+.*: ba0407cf rmif x30, #8, #15
+.*: 3a00080d setf8 w0
+.*: 3a00480d setf16 w0
+.*: d500401f cfinv
+.*: ba0407cf rmif x30, #8, #15
+.*: 3a00080d setf8 w0
+.*: 3a00480d setf16 w0
--- /dev/null 2023-04-26 09:16:03.694889721 +0100
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/flagm.s 2023-04-26 11:39:10.597962432 +0100
@@ -0,0 +1,16 @@
+/* FLAGM (Condition flag manipulation) feature from Armv8.4-A. */
+.arch armv8.4-a
+
+ cfinv
+ rmif x30, #8, #15
+ setf8 w0
+ setf16 w0
+
+
+/* FLAGM feature enabled with +flagm. */
+.arch armv8-a+flagm
+
+ cfinv
+ rmif x30, #8, #15
+ setf8 w0
+ setf16 w0

53
SOURCES/binutils-aarch64-rng.patch
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@ -0,0 +1,53 @@ @@ -0,0 +1,53 @@
Only in binutils-2.35.2/gas/testsuite/gas/aarch64: rng-1.d
Only in binutils-2.35.2/gas/testsuite/gas/aarch64: rng-1.s
diff -rup binutils.orig/opcodes/aarch64-opc.c binutils-2.35.2/opcodes/aarch64-opc.c
--- binutils.orig/opcodes/aarch64-opc.c 2022-04-05 11:50:10.131798329 +0100
+++ binutils-2.35.2/opcodes/aarch64-opc.c 2022-04-05 11:54:32.596827591 +0100
@@ -3810,9 +3810,6 @@ aarch64_print_operand (char *buf, size_t
#define SR_FEAT(n,e,f,feat) \
SYSREG ((n), (e), (f) | F_ARCHEXT, AARCH64_FEATURE_##feat)
-#define SR_RNG(n,e,f) \
- SYSREG ((n), (e), (f) | F_ARCHEXT, AARCH64_FEATURE_RNG | AARCH64_FEATURE_V8_5)
-
#define SR_V8_1(n,e,f) SR_FEAT (n,e,f,V8_1)
#define SR_V8_2(n,e,f) SR_FEAT (n,e,f,V8_2)
#define SR_V8_3(n,e,f) SR_FEAT (n,e,f,V8_3)
@@ -3820,6 +3817,7 @@ aarch64_print_operand (char *buf, size_t
#define SR_V8_4(n,e,f) SR_FEAT (n,e,f,V8_4)
#define SR_PAN(n,e,f) SR_FEAT (n,e,f,PAN)
#define SR_RAS(n,e,f) SR_FEAT (n,e,f,RAS)
+#define SR_RNG(n,e,f) SR_FEAT (n,e,f,RNG)
#define SR_SSBS(n,e,f) SR_FEAT (n,e,f,SSBS)
#define SR_SVE(n,e,f) SR_FEAT (n,e,f,SVE)
#define SR_ID_PFR2(n,e,f) SR_FEAT (n,e,f,ID_PFR2)
--- /dev/null 2022-04-05 09:32:54.900867346 +0100
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/rng-1.s 2022-04-05 11:55:13.973674567 +0100
@@ -0,0 +1,3 @@
+ .arch armv8.4-a+rng
+ mrs x5, rndr
+ mrs x6, rndrrs
--- /dev/null 2022-04-05 09:32:54.900867346 +0100
+++ binutils-2.35.2/gas/testsuite/gas/aarch64/rng-1.d 2022-04-05 11:55:45.338558554 +0100
@@ -0,0 +1,10 @@
+#source: rng-1.s
+#objdump: -dr
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+ <.*>:
+.*: d53b2405 mrs x5, rndr
+.*: d53b2426 mrs x6, rndrrs
--- binutils.orig/gas/config/tc-aarch64.c 2022-05-23 09:44:07.623234684 +0100
+++ binutils-2.35.2/gas/config/tc-aarch64.c 2022-05-23 09:47:09.147696001 +0100
@@ -9206,7 +9206,7 @@ aarch64_parse_features (const char *str,
break;
}
- if (opt->name == NULL)
+ if (opt->name == NULL && adding_value)
{
as_bad (_("unknown architectural extension `%s'"), str);
return 0;

11
SOURCES/binutils-autoconf-version.patch
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@ -0,0 +1,11 @@ @@ -0,0 +1,11 @@
--- binutils.orig/config/override.m4 2021-08-31 14:20:17.275574804 +0100
+++ binutils-2.37/config/override.m4 2021-08-31 14:36:37.793954247 +0100
@@ -41,7 +41,7 @@ dnl Or for updating the whole tree at on
AC_DEFUN([_GCC_AUTOCONF_VERSION_CHECK],
[m4_if(m4_defn([_GCC_AUTOCONF_VERSION]),
m4_defn([m4_PACKAGE_VERSION]), [],
- [m4_fatal([Please use exactly Autoconf ]_GCC_AUTOCONF_VERSION[ instead of ]m4_defn([m4_PACKAGE_VERSION])[.])])
+ [])
])
m4_define([AC_INIT], m4_defn([AC_INIT])[
_GCC_AUTOCONF_VERSION_CHECK

17
SOURCES/binutils-increase-the-max-number-of-open-fi.patch
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@ -0,0 +1,17 @@ @@ -0,0 +1,17 @@

diff --git a/ld/testsuite/ld-plugin/lto.exp b/ld/testsuite/ld-plugin/lto.exp
index 3c129760498..dbda6c4465d 100644
--- a/ld/testsuite/ld-plugin/lto.exp
+++ b/ld/testsuite/ld-plugin/lto.exp
@@ -721,7 +721,7 @@ if { [at_least_gcc_version 4 7] } {
] \
]
set exec_output [run_host_cmd "sh" \
- "-c \"ulimit -n 16; \
+ "-c \" \
$ar -rc $plug_opt \
tmpdir/libpr23460.a \
tmpdir/pr23460a.o \
--
2.38.1

59
SOURCES/binutils-ld-ir-plugin.patch
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@ -0,0 +1,59 @@ @@ -0,0 +1,59 @@
diff -rup binutils.orig/bfd/elflink.c binutils-2.35.2/bfd/elflink.c
--- binutils.orig/bfd/elflink.c 2022-11-28 16:10:23.919422266 +0000
+++ binutils-2.35.2/bfd/elflink.c 2022-11-28 16:14:24.308499080 +0000
@@ -1260,14 +1260,25 @@ _bfd_elf_merge_symbol (bfd *abfd,
olddyn = (oldsec->symbol->flags & BSF_DYNAMIC) != 0;
}
- /* Handle a case where plugin_notice won't be called and thus won't
- set the non_ir_ref flags on the first pass over symbols. */
if (oldbfd != NULL
- && (oldbfd->flags & BFD_PLUGIN) != (abfd->flags & BFD_PLUGIN)
- && newdyn != olddyn)
+ && (oldbfd->flags & BFD_PLUGIN) != (abfd->flags & BFD_PLUGIN))
{
- h->root.non_ir_ref_dynamic = TRUE;
- hi->root.non_ir_ref_dynamic = TRUE;
+ if (newdyn != olddyn)
+ {
+ /* Handle a case where plugin_notice won't be called and thus
+ won't set the non_ir_ref flags on the first pass over
+ symbols. */
+ h->root.non_ir_ref_dynamic = TRUE;
+ hi->root.non_ir_ref_dynamic = TRUE;
+ }
+
+ if ((oldbfd->flags & BFD_PLUGIN) != 0
+ && hi->root.type == bfd_link_hash_indirect)
+ {
+ /* Change indirect symbol from IR to undefined. */
+ hi->root.type = bfd_link_hash_undefined;
+ hi->root.u.undef.abfd = oldbfd;
+ }
}
/* NEWDEF and OLDDEF indicate whether the new or old symbol,
diff -rup binutils.orig/bfd/linker.c binutils-2.35.2/bfd/linker.c
--- binutils.orig/bfd/linker.c 2022-11-28 16:10:23.822422639 +0000
+++ binutils-2.35.2/bfd/linker.c 2022-11-28 16:13:28.709712603 +0000
@@ -1672,7 +1672,7 @@ _bfd_generic_link_add_one_symbol (struct
case MIND:
/* Multiple indirect symbols. This is OK if they both point
to the same symbol. */
- if (strcmp (h->u.i.link->root.string, string) == 0)
+ if (string != NULL && strcmp (h->u.i.link->root.string, string) == 0)
break;
/* Fall through. */
case MDEF:
--- binutils.orig/bfd/elflink.c 2023-01-10 15:47:50.062668055 +0000
+++ binutils-2.35.2/bfd/elflink.c 2023-01-10 15:47:59.554659559 +0000
@@ -1271,8 +1271,7 @@ _bfd_elf_merge_symbol (bfd *abfd,
h->root.non_ir_ref_dynamic = TRUE;
hi->root.non_ir_ref_dynamic = TRUE;
}
-
- if ((oldbfd->flags & BFD_PLUGIN) != 0
+ else if ((oldbfd->flags & BFD_PLUGIN) != 0
&& hi->root.type == bfd_link_hash_indirect)
{
/* Change indirect symbol from IR to undefined. */

17
SOURCES/binutils-memory-access-when-parsing-an-elf-file.patch
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@ -0,0 +1,17 @@ @@ -0,0 +1,17 @@
diff --git a/bfd/elf.c b/bfd/elf.c
index fe00e0f9189..7cd7febcf95 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -8918,7 +8918,9 @@ _bfd_elf_slurp_version_tables (bfd *abfd, bool default_imported_symver)
bfd_set_error (bfd_error_file_too_big);
goto error_return_verref;
}
- elf_tdata (abfd)->verref = (Elf_Internal_Verneed *) bfd_alloc (abfd, amt);
+ if (amt == 0)
+ goto error_return_verref;
+ elf_tdata (abfd)->verref = (Elf_Internal_Verneed *) bfd_zalloc (abfd, amt);
if (elf_tdata (abfd)->verref == NULL)
goto error_return_verref;
--
2.31.1

30
SOURCES/binutils-no-comment-in-bfd-stdint.patch
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@ -0,0 +1,30 @@ @@ -0,0 +1,30 @@
diff -rup binutils.orig/bfd/configure binutils-2.35.2/bfd/configure
--- binutils.orig/bfd/configure 2023-01-19 12:17:21.293513059 +0000
+++ binutils-2.35.2/bfd/configure 2023-01-19 12:27:25.783974084 +0000
@@ -18921,11 +18921,6 @@ _LT_EOF
esac
done ;;
"bfd_stdint.h":C)
-if test "$GCC" = yes; then
- echo "/* generated for " `$CC --version | sed 1q` "*/" > tmp-stdint.h
-else
- echo "/* generated for $CC */" > tmp-stdint.h
-fi
sed 's/^ *//' >> tmp-stdint.h <<EOF
diff -rup binutils.orig/config/stdint.m4 binutils-2.35.2/config/stdint.m4
--- binutils.orig/config/stdint.m4 2023-01-19 12:17:20.169515897 +0000
+++ binutils-2.35.2/config/stdint.m4 2023-01-19 12:27:02.920032688 +0000
@@ -192,11 +192,6 @@ fi
# ----------------- done all checks, emit header -------------
AC_CONFIG_COMMANDS(_GCC_STDINT_H, [
-if test "$GCC" = yes; then
- echo "/* generated for " `$CC --version | sed 1q` "*/" > tmp-stdint.h
-else
- echo "/* generated for $CC */" > tmp-stdint.h
-fi
sed 's/^ *//' >> tmp-stdint.h <<EOF

51
SOURCES/binutils-s390-z16.patch
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@ -0,0 +1,51 @@ @@ -0,0 +1,51 @@
diff -rup binutils-2.35.2/gas/config/tc-s390.c fred/gas/config/tc-s390.c
--- binutils-2.35.2/gas/config/tc-s390.c 2022-04-11 08:54:46.529179603 +0100
+++ fred/gas/config/tc-s390.c 2022-04-11 08:51:08.030832065 +0100
@@ -293,7 +293,7 @@ s390_parse_cpu (const char * arg
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
{ STRING_COMMA_LEN ("z15"), STRING_COMMA_LEN ("arch13"),
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX },
- { STRING_COMMA_LEN (""), STRING_COMMA_LEN ("arch14"),
+ { STRING_COMMA_LEN ("z16"), STRING_COMMA_LEN ("arch14"),
S390_INSTR_FLAG_HTM | S390_INSTR_FLAG_VX }
};
static struct
diff -rup binutils-2.35.2/gas/doc/as.texi fred/gas/doc/as.texi
--- binutils-2.35.2/gas/doc/as.texi 2022-04-11 08:54:46.099182880 +0100
+++ fred/gas/doc/as.texi 2022-04-11 08:52:33.088196625 +0100
@@ -1872,8 +1872,8 @@ Specify which s390 processor variant is
@samp{arch3}), @samp{g6}, @samp{z900} (or @samp{arch5}), @samp{z990} (or
@samp{arch6}), @samp{z9-109}, @samp{z9-ec} (or @samp{arch7}), @samp{z10} (or
@samp{arch8}), @samp{z196} (or @samp{arch9}), @samp{zEC12} (or @samp{arch10}),
-@samp{z13} (or @samp{arch11}), @samp{z14} (or @samp{arch12}), or @samp{z15}
-(or @samp{arch13}).
+@samp{z13} (or @samp{arch11}), @samp{z14} (or @samp{arch12}), @samp{z15}
+(or @samp{arch13}), or @samp{z16} (or @samp{arch14}).
@item -mregnames
@itemx -mno-regnames
Allow or disallow symbolic names for registers.
diff -rup binutils-2.35.2/gas/doc/c-s390.texi fred/gas/doc/c-s390.texi
--- binutils-2.35.2/gas/doc/c-s390.texi 2022-04-11 08:54:46.551179435 +0100
+++ fred/gas/doc/c-s390.texi 2022-04-11 08:51:50.623520271 +0100
@@ -18,7 +18,7 @@ and eleven chip levels. The architecture
Architecture (ESA) and the newer z/Architecture mode. The chip levels
are g5 (or arch3), g6, z900 (or arch5), z990 (or arch6), z9-109, z9-ec
(or arch7), z10 (or arch8), z196 (or arch9), zEC12 (or arch10), z13
-(or arch11), z14 (or arch12), z15 (or arch13), or arch14.
+(or arch11), z14 (or arch12), z15 (or arch13), or z16 (or arch14).
@menu
* s390 Options:: Command-line Options.
diff -rup binutils-2.35.2/opcodes/s390-mkopc.c fred/opcodes/s390-mkopc.c
--- binutils-2.35.2/opcodes/s390-mkopc.c 2022-04-11 08:54:46.530179595 +0100
+++ fred/opcodes/s390-mkopc.c 2022-04-11 08:53:04.701955680 +0100
@@ -380,7 +380,8 @@ main (void)
else if (strcmp (cpu_string, "z15") == 0
|| strcmp (cpu_string, "arch13") == 0)
min_cpu = S390_OPCODE_ARCH13;
- else if (strcmp (cpu_string, "arch14") == 0)
+ else if (strcmp (cpu_string, "z16") == 0
+ || strcmp (cpu_string, "arch14") == 0)
min_cpu = S390_OPCODE_ARCH14;
else {
fprintf (stderr, "Couldn't parse cpu string %s\n", cpu_string);

143
SOURCES/binutils-s390x-static-PIE.patch
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@ -0,0 +1,143 @@ @@ -0,0 +1,143 @@
diff -rup binutils.orig/bfd/elf64-s390.c binutils-2.35.2/bfd/elf64-s390.c
--- binutils.orig/bfd/elf64-s390.c 2022-05-03 12:03:39.004203905 +0100
+++ binutils-2.35.2/bfd/elf64-s390.c 2022-05-03 12:06:19.884715801 +0100
@@ -773,7 +773,7 @@ elf_s390_tls_transition (struct bfd_link
int r_type,
int is_local)
{
- if (bfd_link_pic (info))
+ if (bfd_link_dll (info))
return r_type;
switch (r_type)
@@ -1025,7 +1025,7 @@ elf_s390_check_relocs (bfd *abfd,
case R_390_TLS_GOTIE20:
case R_390_TLS_GOTIE64:
case R_390_TLS_IEENT:
- if (bfd_link_pic (info))
+ if (bfd_link_dll (info))
info->flags |= DF_STATIC_TLS;
/* Fall through */
@@ -1106,7 +1106,7 @@ elf_s390_check_relocs (bfd *abfd,
if (r_type == R_390_TLS_LE64 && bfd_link_pie (info))
break;
- if (!bfd_link_pic (info))
+ if (!bfd_link_dll (info))
break;
info->flags |= DF_STATIC_TLS;
/* Fall through */
@@ -1570,7 +1570,7 @@ allocate_dynrelocs (struct elf_link_hash
to R_390_TLS_LE64 requiring no TLS entry. For GOTIE12 and IEENT
we can save the dynamic TLS relocation. */
if (h->got.refcount > 0
- && !bfd_link_pic (info)
+ && !bfd_link_dll (info)
&& h->dynindx == -1
&& elf_s390_hash_entry(h)->tls_type >= GOT_TLS_IE)
{
@@ -1875,7 +1875,20 @@ elf_s390_size_dynamic_sections (bfd *out
else if (CONST_STRNEQ (bfd_section_name (s), ".rela"))
{
if (s->size != 0 && s != htab->elf.srelplt)
- relocs = TRUE;
+ {
+ relocs = TRUE;
+ if (s == htab->elf.irelplt)
+ {
+ /* In static-pie case, there are IRELATIVE-relocs in
+ .rela.iplt (htab->irelplt), which will later be grouped
+ to .rela.plt. On s390, the IRELATIVE relocations are
+ always located in .rela.iplt - even for non-static case.
+ Ensure that DT_JMPREL, DT_PLTRELA, DT_PLTRELASZ is added
+ to the dynamic section even if htab->srelplt->size == 0.
+ See _bfd_elf_add_dynamic_tags in bfd/elflink.c. */
+ htab->elf.dt_jmprel_required = TRUE;
+ }
+ }
/* We use the reloc_count field as a counter if we need
to copy relocs into the output file. */
@@ -2661,7 +2674,7 @@ elf_s390_relocate_section (bfd *output_b
/* Relocations for tls literal pool entries. */
case R_390_TLS_IE64:
- if (bfd_link_pic (info))
+ if (bfd_link_dll (info))
{
Elf_Internal_Rela outrel;
asection *sreloc;
@@ -2689,7 +2702,7 @@ elf_s390_relocate_section (bfd *output_b
else if (h != NULL)
{
tls_type = elf_s390_hash_entry(h)->tls_type;
- if (!bfd_link_pic (info) && h->dynindx == -1 && tls_type >= GOT_TLS_IE)
+ if (!bfd_link_dll (info) && h->dynindx == -1 && tls_type >= GOT_TLS_IE)
r_type = R_390_TLS_LE64;
}
if (r_type == R_390_TLS_GD64 && tls_type >= GOT_TLS_IE)
@@ -2800,14 +2813,14 @@ elf_s390_relocate_section (bfd *output_b
if (local_got_offsets == NULL)
abort();
off = local_got_offsets[r_symndx];
- if (bfd_link_pic (info))
+ if (bfd_link_dll (info))
goto emit_tls_relocs;
}
else
{
off = h->got.offset;
tls_type = elf_s390_hash_entry(h)->tls_type;
- if (bfd_link_pic (info) || h->dynindx != -1 || tls_type < GOT_TLS_IE)
+ if (bfd_link_dll (info) || h->dynindx != -1 || tls_type < GOT_TLS_IE)
goto emit_tls_relocs;
}
@@ -2824,7 +2837,7 @@ elf_s390_relocate_section (bfd *output_b
break;
case R_390_TLS_LDM64:
- if (! bfd_link_pic (info))
+ if (! bfd_link_dll (info))
/* The literal pool entry this relocation refers to gets ignored
by the optimized code of the local exec model. Do nothing
and the value will turn out zero. */
@@ -2899,7 +2912,7 @@ elf_s390_relocate_section (bfd *output_b
continue;
case R_390_TLS_LDO64:
- if (bfd_link_pic (info) || (input_section->flags & SEC_DEBUGGING))
+ if (bfd_link_dll (info) || (input_section->flags & SEC_DEBUGGING))
relocation -= dtpoff_base (info);
else
/* When converting LDO to LE, we must negate. */
@@ -2921,7 +2934,7 @@ elf_s390_relocate_section (bfd *output_b
if (r_type == R_390_TLS_LOAD)
{
- if (!bfd_link_pic (info) && (h == NULL || h->dynindx == -1))
+ if (!bfd_link_dll (info) && (h == NULL || h->dynindx == -1))
{
/* IE->LE transition. Four valid cases:
lg %rx,(0,%ry) -> sllg %rx,%ry,0
@@ -2971,7 +2984,7 @@ elf_s390_relocate_section (bfd *output_b
invalid_tls_insn (input_bfd, input_section, rel);
return FALSE;
}
- if (!bfd_link_pic (info) && (h == NULL || h->dynindx == -1))
+ if (!bfd_link_dll (info) && (h == NULL || h->dynindx == -1))
{
/* GD->LE transition.
brasl %r14,__tls_get_addr@plt -> brcl 0,. */
@@ -2990,7 +3003,7 @@ elf_s390_relocate_section (bfd *output_b
}
else if (r_type == R_390_TLS_LDCALL)
{
- if (!bfd_link_pic (info))
+ if (!bfd_link_dll (info))
{
unsigned int insn0, insn1;
Only in binutils-2.35.2/bfd: elf64-s390.c.orig
Only in binutils-2.35.2/bfd: elf64-s390.c.rej

15
SOURCES/binutils-undefined-ref-to-sym.patch
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@ -0,0 +1,15 @@ @@ -0,0 +1,15 @@
--- binutils.orig/bfd/elflink.c 2022-06-13 14:22:15.071831986 +0100
+++ binutils-2.35.2/bfd/elflink.c 2022-06-13 14:26:37.386163819 +0100
@@ -5226,10 +5226,12 @@ elf_link_add_object_symbols (bfd *abfd,
if (!add_needed
&& matched
&& definition
+ && h->root.type != bfd_link_hash_indirect
&& ((dynsym
&& h->ref_regular_nonweak)
|| (old_bfd != NULL
&& (old_bfd->flags & BFD_PLUGIN) != 0
+ && !info->lto_all_symbols_read
&& bind != STB_WEAK)
|| (h->ref_dynamic_nonweak
&& (elf_dyn_lib_class (abfd) & DYN_AS_NEEDED) != 0

1299
SOURCES/binutils.gold.dwarf-5-support.patch
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File diff suppressed because it is too large Load Diff

28
SOURCES/gcc12-libtool-no-rpath.patch
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@ -0,0 +1,28 @@ @@ -0,0 +1,28 @@
diff -rup binutils.orig/ltmain.sh binutils-2.37/ltmain.sh
--- binutils.orig/ltmain.sh 2022-01-27 16:23:09.304207432 +0000
+++ binutils-2.37/ltmain.sh 2022-01-27 16:23:18.380143759 +0000
@@ -7103,6 +7103,7 @@ EOF
rpath="$finalize_rpath"
test "$mode" != relink && rpath="$compile_rpath$rpath"
for libdir in $rpath; do
+ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
if test -n "$hardcode_libdir_flag_spec"; then
if test -n "$hardcode_libdir_separator"; then
if test -z "$hardcode_libdirs"; then
@@ -7798,6 +7799,7 @@ EOF
rpath=
hardcode_libdirs=
for libdir in $compile_rpath $finalize_rpath; do
+ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
if test -n "$hardcode_libdir_flag_spec"; then
if test -n "$hardcode_libdir_separator"; then
if test -z "$hardcode_libdirs"; then
@@ -7849,6 +7851,7 @@ EOF
rpath=
hardcode_libdirs=
for libdir in $finalize_rpath; do
+ case "$libdir" in /usr/lib|/usr/lib64|/usr/lib/../lib|/usr/lib/../lib64) continue;; esac
if test -n "$hardcode_libdir_flag_spec"; then
if test -n "$hardcode_libdir_separator"; then
if test -z "$hardcode_libdirs"; then
Only in binutils-2.37: ltmain.sh.orig

940
SPECS/binutils.spec
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File diff suppressed because it is too large Load Diff
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