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79 lines
3.2 KiB
79 lines
3.2 KiB
From a481ab548d038c1dfd52ee211b997e2dd33ff5ae Mon Sep 17 00:00:00 2001 |
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From: Hal Finkel <hfinkel@anl.gov> |
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Date: Wed, 6 Sep 2017 03:08:26 +0000 |
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Subject: [PATCH] [PowerPC] Don't use xscvdpspn on the P7 |
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xscvdpspn was not introduced until the P8, so don't use it on the P7. Fixes a |
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regression introduced in r288152. |
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@312612 91177308-0d34-0410-b5e6-96231b3b80d8 |
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--- |
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lib/Target/PowerPC/PPCISelLowering.cpp | 9 ++++++--- |
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test/CodeGen/PowerPC/fp-splat.ll | 27 +++++++++++++++++++++++++++ |
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2 files changed, 33 insertions(+), 3 deletions(-) |
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create mode 100644 test/CodeGen/PowerPC/fp-splat.ll |
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diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp |
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index 74dedaf..6295693 100644 |
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--- a/lib/Target/PowerPC/PPCISelLowering.cpp |
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+++ b/lib/Target/PowerPC/PPCISelLowering.cpp |
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@@ -7463,9 +7463,11 @@ static SDValue BuildVSLDOI(SDValue LHS, SDValue RHS, unsigned Amt, EVT VT, |
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/// - The node is a "load-and-splat" |
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/// In all other cases, we will choose to keep the BUILD_VECTOR. |
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static bool haveEfficientBuildVectorPattern(BuildVectorSDNode *V, |
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- bool HasDirectMove) { |
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+ bool HasDirectMove, |
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+ bool HasP8Vector) { |
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EVT VecVT = V->getValueType(0); |
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- bool RightType = VecVT == MVT::v2f64 || VecVT == MVT::v4f32 || |
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+ bool RightType = VecVT == MVT::v2f64 || |
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+ (HasP8Vector && VecVT == MVT::v4f32) || |
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(HasDirectMove && (VecVT == MVT::v2i64 || VecVT == MVT::v4i32)); |
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if (!RightType) |
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return false; |
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@@ -7627,7 +7629,8 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op, |
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// lowered to VSX instructions under certain conditions. |
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// Without VSX, there is no pattern more efficient than expanding the node. |
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if (Subtarget.hasVSX() && |
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- haveEfficientBuildVectorPattern(BVN, Subtarget.hasDirectMove())) |
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+ haveEfficientBuildVectorPattern(BVN, Subtarget.hasDirectMove(), |
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+ Subtarget.hasP8Vector())) |
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return Op; |
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return SDValue(); |
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} |
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diff --git a/test/CodeGen/PowerPC/fp-splat.ll b/test/CodeGen/PowerPC/fp-splat.ll |
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new file mode 100644 |
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index 0000000..9b1ab21 |
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--- /dev/null |
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+++ b/test/CodeGen/PowerPC/fp-splat.ll |
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@@ -0,0 +1,27 @@ |
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+; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s -check-prefix=CHECK-P8 -check-prefix=CHECK |
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+; RUN: llc -mcpu=pwr7 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=CHECK-P7 -check-prefix=CHECK |
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+ |
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+define <4 x float> @test1(float %a) { |
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+entry: |
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+; CHECK-LABEL: test1 |
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+ %vecins = insertelement <4 x float> undef, float %a, i32 0 |
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+ %vecins1 = insertelement <4 x float> %vecins, float %a, i32 1 |
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+ %vecins2 = insertelement <4 x float> %vecins1, float %a, i32 2 |
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+ %vecins3 = insertelement <4 x float> %vecins2, float %a, i32 3 |
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+ ret <4 x float> %vecins3 |
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+; CHECK-P8: xscvdpspn |
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+; CHECK-P7-NOT: xscvdpspn |
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+; CHECK: blr |
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+} |
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+ |
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+define <2 x double> @test2(double %a) { |
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+entry: |
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+; CHECK-LABEL: test2 |
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+ %vecins = insertelement <2 x double> undef, double %a, i32 0 |
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+ %vecins1 = insertelement <2 x double> %vecins, double %a, i32 1 |
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+ ret <2 x double> %vecins1 |
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+; CHECK-P8: xxspltd |
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+; CHECK-P7: xxspltd |
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+; CHECK: blr |
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+} |
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+ |
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-- |
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1.8.3.1 |
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