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107 lines
3.4 KiB
107 lines
3.4 KiB
From 1ac3ecde2f2c9afd7110389eccc6860daa6627ca Mon Sep 17 00:00:00 2001 |
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From: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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Date: Wed, 25 Apr 2018 17:09:37 -0700 |
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Subject: [PATCH libdrm] intel: add support for ICL 11 |
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Add the PCI IDs and the basic code to enable ICL. This is the current |
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PCI ID list in our documentation. |
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Kernel commit: d55cb4fa2cf0 ("drm/i915/icl: Add the ICL PCI IDs") |
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v2: Michel provided a fix to IS_9XX that was broken by rebase bot. |
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v3: Fix double definition of PCI IDs, update IDs according to bspec |
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and keep them in the same order and rebase (Lucas) |
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Cc: Michel Thierry <michel.thierry@intel.com> |
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Reviewed-by: Michel Thierry <michel.thierry@intel.com> |
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Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> |
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Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> |
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Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> |
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--- |
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intel/intel_bufmgr_gem.c | 2 ++ |
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intel/intel_chipset.h | 27 ++++++++++++++++++++++++++- |
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intel/intel_decode.c | 4 +++- |
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3 files changed, 31 insertions(+), 2 deletions(-) |
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diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c |
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index 5c47a46f..8c3a4b20 100644 |
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--- a/intel/intel_bufmgr_gem.c |
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+++ b/intel/intel_bufmgr_gem.c |
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@@ -3660,6 +3660,8 @@ drm_intel_bufmgr_gem_init(int fd, int batch_size) |
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bufmgr_gem->gen = 9; |
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else if (IS_GEN10(bufmgr_gem->pci_device)) |
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bufmgr_gem->gen = 10; |
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+ else if (IS_GEN11(bufmgr_gem->pci_device)) |
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+ bufmgr_gem->gen = 11; |
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else { |
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free(bufmgr_gem); |
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bufmgr_gem = NULL; |
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diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h |
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index ba2e3ac1..32b2c48f 100644 |
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--- a/intel/intel_chipset.h |
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+++ b/intel/intel_chipset.h |
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@@ -257,6 +257,16 @@ |
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#define PCI_CHIP_CANNONLAKE_12 0x5A44 |
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#define PCI_CHIP_CANNONLAKE_13 0x5A4C |
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+#define PCI_CHIP_ICELAKE_11_0 0x8A50 |
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+#define PCI_CHIP_ICELAKE_11_1 0x8A51 |
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+#define PCI_CHIP_ICELAKE_11_2 0x8A5C |
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+#define PCI_CHIP_ICELAKE_11_3 0x8A5D |
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+#define PCI_CHIP_ICELAKE_11_4 0x8A52 |
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+#define PCI_CHIP_ICELAKE_11_5 0x8A5A |
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+#define PCI_CHIP_ICELAKE_11_6 0x8A5B |
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+#define PCI_CHIP_ICELAKE_11_7 0x8A71 |
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+#define PCI_CHIP_ICELAKE_11_8 0x8A70 |
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+ |
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#define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ |
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(devid) == PCI_CHIP_I915_GM || \ |
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(devid) == PCI_CHIP_I945_GM || \ |
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@@ -538,6 +548,20 @@ |
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#define IS_GEN10(devid) (IS_CANNONLAKE(devid)) |
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+#define IS_ICELAKE_11(devid) ((devid) == PCI_CHIP_ICELAKE_11_0 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_1 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_2 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_3 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_4 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_5 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_6 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_7 || \ |
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+ (devid) == PCI_CHIP_ICELAKE_11_8) |
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+ |
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+#define IS_ICELAKE(devid) (IS_ICELAKE_11(devid)) |
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+ |
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+#define IS_GEN11(devid) (IS_ICELAKE_11(devid)) |
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+ |
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#define IS_9XX(dev) (IS_GEN3(dev) || \ |
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IS_GEN4(dev) || \ |
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IS_GEN5(dev) || \ |
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@@ -545,6 +569,7 @@ |
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IS_GEN7(dev) || \ |
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IS_GEN8(dev) || \ |
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IS_GEN9(dev) || \ |
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- IS_GEN10(dev)) |
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+ IS_GEN10(dev) || \ |
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+ IS_GEN11(dev)) |
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#endif /* _INTEL_CHIPSET_H */ |
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diff --git a/intel/intel_decode.c b/intel/intel_decode.c |
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index bc7b04b8..b24861b1 100644 |
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--- a/intel/intel_decode.c |
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+++ b/intel/intel_decode.c |
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@@ -3823,7 +3823,9 @@ drm_intel_decode_context_alloc(uint32_t devid) |
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ctx->devid = devid; |
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ctx->out = stdout; |
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- if (IS_GEN10(devid)) |
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+ if (IS_GEN11(devid)) |
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+ ctx->gen = 11; |
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+ else if (IS_GEN10(devid)) |
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ctx->gen = 10; |
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else if (IS_GEN9(devid)) |
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ctx->gen = 9; |
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-- |
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2.17.1 |
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