From f70d7f3f4600febac0a6d1f62e14230eace8a67b Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Fri, 3 Nov 2017 15:20:08 -0700 Subject: [PATCH 4/5] intel/blorp: Make the MOCS setting part of blorp_address This makes our MOCS settings significantly more flexible. Cc: "17.3" Tested-by: Lyude Paul Reviewed-by: Kenneth Graunke Signed-off-by: Lyude --- src/intel/blorp/blorp.h | 7 +------ src/intel/blorp/blorp_genX_exec.h | 16 +++++++-------- src/intel/vulkan/anv_blorp.c | 11 +++++++--- src/intel/vulkan/genX_blorp_exec.c | 1 + src/mesa/drivers/dri/i965/brw_blorp.c | 31 +++++++++++++++-------------- src/mesa/drivers/dri/i965/genX_blorp_exec.c | 10 ++++++++++ 6 files changed, 43 insertions(+), 33 deletions(-) diff --git a/src/intel/blorp/blorp.h b/src/intel/blorp/blorp.h index e712b4fbb3..ac45828a42 100644 --- a/src/intel/blorp/blorp.h +++ b/src/intel/blorp/blorp.h @@ -45,12 +45,6 @@ struct blorp_context { const struct brw_compiler *compiler; - struct { - uint32_t tex; - uint32_t rb; - uint32_t vb; - } mocs; - bool (*lookup_shader)(struct blorp_context *blorp, const void *key, uint32_t key_size, uint32_t *kernel_out, void *prog_data_out); @@ -95,6 +89,7 @@ struct blorp_address { uint32_t read_domains; uint32_t write_domain; uint32_t offset; + uint32_t mocs; }; struct blorp_surf diff --git a/src/intel/blorp/blorp_genX_exec.h b/src/intel/blorp/blorp_genX_exec.h index 565acca929..d0f0299d17 100644 --- a/src/intel/blorp/blorp_genX_exec.h +++ b/src/intel/blorp/blorp_genX_exec.h @@ -269,7 +269,7 @@ blorp_emit_vertex_buffers(struct blorp_batch *batch, vb[0].VertexBufferIndex = 0; vb[0].BufferPitch = 3 * sizeof(float); #if GEN_GEN >= 6 - vb[0].VertexBufferMOCS = batch->blorp->mocs.vb; + vb[0].VertexBufferMOCS = vb[0].BufferStartingAddress.mocs; #endif #if GEN_GEN >= 7 vb[0].AddressModifyEnable = true; @@ -290,7 +290,7 @@ blorp_emit_vertex_buffers(struct blorp_batch *batch, vb[1].VertexBufferIndex = 1; vb[1].BufferPitch = 0; #if GEN_GEN >= 6 - vb[1].VertexBufferMOCS = batch->blorp->mocs.vb; + vb[1].VertexBufferMOCS = vb[1].BufferStartingAddress.mocs; #endif #if GEN_GEN >= 7 vb[1].AddressModifyEnable = true; @@ -1235,13 +1235,11 @@ blorp_emit_surface_state(struct blorp_batch *batch, write_disable_mask |= ISL_CHANNEL_ALPHA_BIT; } - const uint32_t mocs = - is_render_target ? batch->blorp->mocs.rb : batch->blorp->mocs.tex; - isl_surf_fill_state(batch->blorp->isl_dev, state, .surf = &surf, .view = &surface->view, .aux_surf = &surface->aux_surf, .aux_usage = aux_usage, - .mocs = mocs, .clear_color = surface->clear_color, + .mocs = surface->addr.mocs, + .clear_color = surface->clear_color, .write_disables = write_disable_mask); blorp_surface_reloc(batch, state_offset + isl_dev->ss.addr_offset, @@ -1363,14 +1361,14 @@ blorp_emit_depth_stencil_config(struct blorp_batch *batch, if (dw == NULL) return; - struct isl_depth_stencil_hiz_emit_info info = { - .mocs = batch->blorp->mocs.tex, - }; + struct isl_depth_stencil_hiz_emit_info info = { }; if (params->depth.enabled) { info.view = ¶ms->depth.view; + info.mocs = params->depth.addr.mocs; } else if (params->stencil.enabled) { info.view = ¶ms->stencil.view; + info.mocs = params->stencil.addr.mocs; } if (params->depth.enabled) { diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c index 3a64b60178..b7e9524a24 100644 --- a/src/intel/vulkan/anv_blorp.c +++ b/src/intel/vulkan/anv_blorp.c @@ -92,9 +92,6 @@ anv_device_init_blorp(struct anv_device *device) anv_pipeline_cache_init(&device->blorp_shader_cache, device, true); blorp_init(&device->blorp, device, &device->isl_dev); device->blorp.compiler = device->instance->physicalDevice.compiler; - device->blorp.mocs.tex = device->default_mocs; - device->blorp.mocs.rb = device->default_mocs; - device->blorp.mocs.vb = device->default_mocs; device->blorp.lookup_shader = lookup_blorp_shader; device->blorp.upload_shader = upload_blorp_shader; switch (device->info.gen) { @@ -156,6 +153,7 @@ get_blorp_surf_for_anv_buffer(struct anv_device *device, .addr = { .buffer = buffer->bo, .offset = buffer->offset + offset, + .mocs = device->default_mocs, }, }; @@ -194,6 +192,7 @@ get_blorp_surf_for_anv_image(const struct anv_device *device, .addr = { .buffer = image->bo, .offset = image->offset + surface->offset, + .mocs = device->default_mocs, }, }; @@ -202,6 +201,7 @@ get_blorp_surf_for_anv_image(const struct anv_device *device, blorp_surf->aux_addr = (struct blorp_address) { .buffer = image->bo, .offset = image->offset + image->aux_surface.offset, + .mocs = device->default_mocs, }; blorp_surf->aux_usage = aux_usage; } @@ -585,10 +585,12 @@ void anv_CmdCopyBuffer( struct blorp_address src = { .buffer = src_buffer->bo, .offset = src_buffer->offset + pRegions[r].srcOffset, + .mocs = cmd_buffer->device->default_mocs, }; struct blorp_address dst = { .buffer = dst_buffer->bo, .offset = dst_buffer->offset + pRegions[r].dstOffset, + .mocs = cmd_buffer->device->default_mocs, }; blorp_buffer_copy(&batch, src, dst, pRegions[r].size); @@ -636,10 +638,12 @@ void anv_CmdUpdateBuffer( struct blorp_address src = { .buffer = &cmd_buffer->device->dynamic_state_pool.block_pool.bo, .offset = tmp_data.offset, + .mocs = cmd_buffer->device->default_mocs, }; struct blorp_address dst = { .buffer = dst_buffer->bo, .offset = dst_buffer->offset + dstOffset, + .mocs = cmd_buffer->device->default_mocs, }; blorp_buffer_copy(&batch, src, dst, copy_size); @@ -1530,6 +1534,7 @@ anv_gen8_hiz_op_resolve(struct anv_cmd_buffer *cmd_buffer, surf.aux_addr = (struct blorp_address) { .buffer = image->bo, .offset = image->offset + image->aux_surface.offset, + .mocs = cmd_buffer->device->default_mocs, }; surf.aux_usage = ISL_AUX_USAGE_HIZ; diff --git a/src/intel/vulkan/genX_blorp_exec.c b/src/intel/vulkan/genX_blorp_exec.c index f041fc71b5..b4b05c7022 100644 --- a/src/intel/vulkan/genX_blorp_exec.c +++ b/src/intel/vulkan/genX_blorp_exec.c @@ -134,6 +134,7 @@ blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size, *addr = (struct blorp_address) { .buffer = &cmd_buffer->device->dynamic_state_pool.block_pool.bo, .offset = vb_state.offset, + .mocs = cmd_buffer->device->default_mocs, }; return vb_state.map; diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c index eb08de438d..2b7d960f0c 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.c +++ b/src/mesa/drivers/dri/i965/brw_blorp.c @@ -82,15 +82,9 @@ brw_blorp_init(struct brw_context *brw) brw->blorp.exec = gen5_blorp_exec; break; case 6: - brw->blorp.mocs.tex = 0; - brw->blorp.mocs.rb = 0; - brw->blorp.mocs.vb = 0; brw->blorp.exec = gen6_blorp_exec; break; case 7: - brw->blorp.mocs.tex = GEN7_MOCS_L3; - brw->blorp.mocs.rb = GEN7_MOCS_L3; - brw->blorp.mocs.vb = GEN7_MOCS_L3; if (brw->is_haswell) { brw->blorp.exec = gen75_blorp_exec; } else { @@ -98,21 +92,12 @@ brw_blorp_init(struct brw_context *brw) } break; case 8: - brw->blorp.mocs.tex = BDW_MOCS_WB; - brw->blorp.mocs.rb = BDW_MOCS_PTE; - brw->blorp.mocs.vb = BDW_MOCS_WB; brw->blorp.exec = gen8_blorp_exec; break; case 9: - brw->blorp.mocs.tex = SKL_MOCS_WB; - brw->blorp.mocs.rb = SKL_MOCS_PTE; - brw->blorp.mocs.vb = SKL_MOCS_WB; brw->blorp.exec = gen9_blorp_exec; break; case 10: - brw->blorp.mocs.tex = CNL_MOCS_WB; - brw->blorp.mocs.rb = CNL_MOCS_PTE; - brw->blorp.mocs.vb = CNL_MOCS_WB; brw->blorp.exec = gen10_blorp_exec; break; default: @@ -123,6 +108,20 @@ brw_blorp_init(struct brw_context *brw) brw->blorp.upload_shader = brw_blorp_upload_shader; } +static uint32_t tex_mocs[] = { + [7] = GEN7_MOCS_L3, + [8] = BDW_MOCS_WB, + [9] = SKL_MOCS_WB, + [10] = CNL_MOCS_WB, +}; + +static uint32_t rb_mocs[] = { + [7] = GEN7_MOCS_L3, + [8] = BDW_MOCS_PTE, + [9] = SKL_MOCS_PTE, + [10] = CNL_MOCS_PTE, +}; + static void blorp_surf_for_miptree(struct brw_context *brw, struct blorp_surf *surf, @@ -155,6 +154,7 @@ blorp_surf_for_miptree(struct brw_context *brw, .read_domains = is_render_target ? I915_GEM_DOMAIN_RENDER : I915_GEM_DOMAIN_SAMPLER, .write_domain = is_render_target ? I915_GEM_DOMAIN_RENDER : 0, + .mocs = is_render_target ? rb_mocs[devinfo->gen] : tex_mocs[devinfo->gen], }; surf->aux_usage = aux_usage; @@ -184,6 +184,7 @@ blorp_surf_for_miptree(struct brw_context *brw, .read_domains = is_render_target ? I915_GEM_DOMAIN_RENDER : I915_GEM_DOMAIN_SAMPLER, .write_domain = is_render_target ? I915_GEM_DOMAIN_RENDER : 0, + .mocs = surf->addr.mocs, }; if (mt->mcs_buf) { diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index 62d5c4a792..74c1add281 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c @@ -145,6 +145,16 @@ blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size, .read_domains = I915_GEM_DOMAIN_VERTEX, .write_domain = 0, .offset = offset, + +#if GEN_GEN == 10 + .mocs = CNL_MOCS_WB, +#elif GEN_GEN == 9 + .mocs = SKL_MOCS_WB, +#elif GEN_GEN == 8 + .mocs = BDW_MOCS_WB, +#elif GEN_GEN == 7 + .mocs = GEN7_MOCS_L3, +#endif }; return data; -- 2.14.3