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All attempts: |
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- <https://sourceware.org/ml/gdb-patches/2014-03/msg00576.html> |
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Message-ID: <20140324161056.GB23291@redacted.bos.redhat.com> |
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- <https://sourceware.org/ml/gdb-patches/2014-03/msg00624.html> |
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Message-ID: <20140327015125.GE3075@redacted.bos.redhat.com> |
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(see below) |
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- <https://sourceware.org/ml/gdb-patches/2014-04/msg00433.html> |
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Message-ID: <20140422165542.GA748@redacted.bos.redhat.com> |
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- <https://sourceware.org/ml/gdb-patches/2014-04/msg00505.html> |
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Message-ID: <20140424183510.GI7588@redacted.bos.redhat.com> |
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- <https://sourceware.org/ml/gdb-patches/2014-04/msg00642.html> |
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Message-ID: <20140430160450.GE2148@redacted.bos.redhat.com> |
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(last version, applied) |
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Second message from Kyle, which seems complete enough. |
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Date: Wed, 26 Mar 2014 21:51:26 -0400 |
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From: Kyle McMartin <kmcmarti at redhat dot com> |
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To: gdb-patches at sourceware dot org |
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Subject: [PATCHv2] aarch64: detect atomic sequences like other ll/sc architectures |
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Message-ID: <20140327015125.GE3075@redacted.bos.redhat.com> |
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Add similar single-stepping over atomic sequences support like other |
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load-locked/store-conditional architectures (alpha, powerpc, arm, etc.) |
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do. Verified the decode_masked_match, and decode_bcond works against the |
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atomic sequences used in the Linux kernel atomic.h, and also gcc |
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libatomic. Thanks to Richard Henderson for feedback on my initial |
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attempt at this patch, and for the feedback from gdb-patches, which I |
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hope I've addressed... |
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commit 9404b58f46328b3b171b0d5eeb0691bd685bc4f5 |
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Author: Kyle McMartin <kmcmarti@redhat.com> |
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Date: Wed Apr 30 12:04:50 2014 -0400 |
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aarch64: detect atomic sequences like other ll/sc architectures |
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gdb/Changelog: |
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* aarch64-tdep.c (aarch64_software_single_step): New function. |
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(aarch64_gdbarch_init): Handle single stepping of atomic sequences |
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with aarch64_software_single_step. |
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gdb/testsuite/ChangeLog: |
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* gdb.arch/aarch64-atomic-inst.c: New file. |
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* gdb.arch/aarch64-atomic-inst.exp: New file. |
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Index: gdb-7.6.1/gdb/aarch64-tdep.c |
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=================================================================== |
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--- gdb-7.6.1.orig/gdb/aarch64-tdep.c |
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+++ gdb-7.6.1/gdb/aarch64-tdep.c |
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@@ -2518,6 +2518,84 @@ value_of_aarch64_user_reg (struct frame_ |
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} |
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+/* Implement the "software_single_step" gdbarch method, needed to |
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+ single step through atomic sequences on AArch64. */ |
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+ |
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+static int |
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+aarch64_software_single_step (struct frame_info *frame) |
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+{ |
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+ struct gdbarch *gdbarch = get_frame_arch (frame); |
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+ struct address_space *aspace = get_frame_address_space (frame); |
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+ enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch); |
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+ const int insn_size = 4; |
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+ const int atomic_sequence_length = 16; /* Instruction sequence length. */ |
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+ CORE_ADDR pc = get_frame_pc (frame); |
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+ CORE_ADDR breaks[2] = { -1, -1 }; |
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+ CORE_ADDR loc = pc; |
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+ CORE_ADDR closing_insn = 0; |
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+ uint32_t insn = read_memory_unsigned_integer (loc, insn_size, |
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+ byte_order_for_code); |
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+ int index; |
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+ int insn_count; |
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+ int bc_insn_count = 0; /* Conditional branch instruction count. */ |
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+ int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */ |
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+ |
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+ /* Look for a Load Exclusive instruction which begins the sequence. */ |
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+ if (!decode_masked_match (insn, 0x3fc00000, 0x08400000)) |
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+ return 0; |
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+ |
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+ for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count) |
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+ { |
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+ int32_t offset; |
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+ unsigned cond; |
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+ |
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+ loc += insn_size; |
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+ insn = read_memory_unsigned_integer (loc, insn_size, |
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+ byte_order_for_code); |
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+ |
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+ /* Check if the instruction is a conditional branch. */ |
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+ if (decode_bcond (loc, insn, &cond, &offset)) |
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+ { |
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+ if (bc_insn_count >= 1) |
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+ return 0; |
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+ |
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+ /* It is, so we'll try to set a breakpoint at the destination. */ |
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+ breaks[1] = loc + offset; |
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+ |
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+ bc_insn_count++; |
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+ last_breakpoint++; |
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+ } |
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+ |
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+ /* Look for the Store Exclusive which closes the atomic sequence. */ |
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+ if (decode_masked_match (insn, 0x3fc00000, 0x08000000)) |
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+ { |
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+ closing_insn = loc; |
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+ break; |
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+ } |
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+ } |
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+ |
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+ /* We didn't find a closing Store Exclusive instruction, fall back. */ |
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+ if (!closing_insn) |
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+ return 0; |
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+ |
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+ /* Insert breakpoint after the end of the atomic sequence. */ |
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+ breaks[0] = loc + insn_size; |
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+ |
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+ /* Check for duplicated breakpoints, and also check that the second |
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+ breakpoint is not within the atomic sequence. */ |
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+ if (last_breakpoint |
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+ && (breaks[1] == breaks[0] |
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+ || (breaks[1] >= pc && breaks[1] <= closing_insn))) |
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+ last_breakpoint = 0; |
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+ |
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+ /* Insert the breakpoint at the end of the sequence, and one at the |
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+ destination of the conditional branch, if it exists. */ |
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+ for (index = 0; index <= last_breakpoint; index++) |
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+ insert_single_step_breakpoint (gdbarch, aspace, breaks[index]); |
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+ |
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+ return 1; |
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+} |
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+ |
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/* Initialize the current architecture based on INFO. If possible, |
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re-use an architecture from ARCHES, which is a list of |
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architectures already created during this debugging session. |
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@@ -2635,6 +2713,7 @@ aarch64_gdbarch_init (struct gdbarch_inf |
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set_gdbarch_breakpoint_from_pc (gdbarch, aarch64_breakpoint_from_pc); |
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set_gdbarch_cannot_step_breakpoint (gdbarch, 1); |
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set_gdbarch_have_nonsteppable_watchpoint (gdbarch, 1); |
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+ set_gdbarch_software_single_step (gdbarch, aarch64_software_single_step); |
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/* Information about registers, etc. */ |
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set_gdbarch_sp_regnum (gdbarch, AARCH64_SP_REGNUM); |
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Index: gdb-7.6.1/gdb/testsuite/gdb.arch/aarch64-atomic-inst.c |
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=================================================================== |
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--- /dev/null |
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+++ gdb-7.6.1/gdb/testsuite/gdb.arch/aarch64-atomic-inst.c |
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@@ -0,0 +1,48 @@ |
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+/* This file is part of GDB, the GNU debugger. |
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+ |
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+ Copyright 2008-2014 Free Software Foundation, Inc. |
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+ |
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+ This program is free software; you can redistribute it and/or modify |
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+ it under the terms of the GNU General Public License as published by |
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+ the Free Software Foundation; either version 3 of the License, or |
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+ (at your option) any later version. |
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+ |
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+ This program is distributed in the hope that it will be useful, |
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of |
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|
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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+ GNU General Public License for more details. |
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+ |
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+ You should have received a copy of the GNU General Public License |
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+ along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
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+ |
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+int main(void) |
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+{ |
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+ unsigned long tmp, cond; |
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+ unsigned long dword = 0; |
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+ |
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+ /* Test that we can step over ldxr/stxr. This sequence should step from |
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+ ldxr to the following __asm __volatile. */ |
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+ __asm __volatile ("1: ldxr %0,%2\n" \ |
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+ " cmp %0,#1\n" \ |
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+ " b.eq out\n" \ |
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+ " add %0,%0,1\n" \ |
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+ " stxr %w1,%0,%2\n" \ |
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+ " cbnz %w1,1b" \ |
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+ : "=&r" (tmp), "=&r" (cond), "+Q" (dword) \ |
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+ : : "memory"); |
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+ |
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+ /* This sequence should take the conditional branch and step from ldxr |
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+ to the return dword line. */ |
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|
+ __asm __volatile ("1: ldxr %0,%2\n" \ |
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+ " cmp %0,#1\n" \ |
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+ " b.eq out\n" \ |
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+ " add %0,%0,1\n" \ |
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+ " stxr %w1,%0,%2\n" \ |
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+ " cbnz %w1,1b\n" \ |
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+ : "=&r" (tmp), "=&r" (cond), "+Q" (dword) \ |
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+ : : "memory"); |
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+ |
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+ dword = -1; |
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+__asm __volatile ("out:\n"); |
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|
+ return dword; |
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+} |
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|
Index: gdb-7.6.1/gdb/testsuite/gdb.arch/aarch64-atomic-inst.exp |
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|
=================================================================== |
|
|
--- /dev/null |
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|
+++ gdb-7.6.1/gdb/testsuite/gdb.arch/aarch64-atomic-inst.exp |
|
|
@@ -0,0 +1,48 @@ |
|
|
+# Copyright 2008-2014 Free Software Foundation, Inc. |
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|
+# |
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|
+# This program is free software; you can redistribute it and/or modify |
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|
+# it under the terms of the GNU General Public License as published by |
|
|
+# the Free Software Foundation; either version 3 of the License, or |
|
|
+# (at your option) any later version. |
|
|
+# |
|
|
+# This program is distributed in the hope that it will be useful, |
|
|
+# but WITHOUT ANY WARRANTY; without even the implied warranty of |
|
|
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
|
|
+# GNU General Public License for more details. |
|
|
+# |
|
|
+# You should have received a copy of the GNU General Public License |
|
|
+# along with this program; if not, write to the Free Software |
|
|
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
|
|
+# |
|
|
+# This file is part of the gdb testsuite. |
|
|
+ |
|
|
+# Test single stepping through atomic sequences beginning with |
|
|
+# a ldxr instruction and ending with a stxr instruction. |
|
|
+ |
|
|
+if {![istarget "aarch64*"]} { |
|
|
+ verbose "Skipping ${gdb_test_file_name}." |
|
|
+ return |
|
|
+} |
|
|
+ |
|
|
+standard_testfile |
|
|
+if { [prepare_for_testing ${testfile}.exp ${testfile} ${srcfile}] } { |
|
|
+ return -1 |
|
|
+} |
|
|
+ |
|
|
+if ![runto_main] { |
|
|
+ untested "could not run to main" |
|
|
+ return -1 |
|
|
+} |
|
|
+ |
|
|
+gdb_breakpoint "[gdb_get_line_number "ldxr"]" \ |
|
|
+ "Breakpoint $decimal at $hex" \ |
|
|
+ "Set the breakpoint at the start of the sequence" |
|
|
+ |
|
|
+gdb_test "continue" "Continuing.*Breakpoint $decimal.*" \ |
|
|
+ "Continue until breakpoint" |
|
|
+ |
|
|
+gdb_test "next" ".*__asm __volatile.*" \ |
|
|
+ "Step through the ldxr/stxr sequence" |
|
|
+ |
|
|
+gdb_test "next" ".*return dword.*" \ |
|
|
+ "Stepped through sequence through conditional branch"
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|
