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386 lines
14 KiB
386 lines
14 KiB
# MPX Support for glibc: |
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# |
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# Note: Renamed configure.ac changes to configure.in changes. |
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# |
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# commit ea8ba7cd14d0f479bae8365ae5c4ef177bdd0aad |
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# Author: Igor Zamyatin <igor.zamyatin@intel.com> |
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# Date: Wed Apr 16 14:43:16 2014 -0700 |
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# |
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# Save/restore bound registers for _dl_runtime_profile |
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# |
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# This patch saves and restores bound registers in x86-64 PLT for |
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# ld.so profile and LD_AUDIT: |
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# |
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# * sysdeps/x86_64/bits/link.h (La_x86_64_regs): Add lr_bnd. |
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# (La_x86_64_retval): Add lrv_bnd0 and lrv_bnd1. |
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# * sysdeps/x86_64/dl-trampoline.S (_dl_runtime_profile): Save |
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# Intel MPX bound registers before _dl_profile_fixup. |
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# * sysdeps/x86_64/dl-trampoline.h: Restore Intel MPX bound |
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# registers after _dl_profile_fixup. Save and restore bound |
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# registers bnd0/bnd1 when calling _dl_call_pltexit. |
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# * sysdeps/x86_64/link-defines.sym (BND_SIZE): New. |
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# (LR_BND_OFFSET): Likewise. |
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# (LRV_BND0_OFFSET): Likewise. |
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# (LRV_BND1_OFFSET): Likewise. |
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# |
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# commit a4c75cfd56e536c2b18556e8a482d88dffa0fffc |
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# Author: Igor Zamyatin <igor.zamyatin@intel.com> |
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# Date: Tue Apr 1 10:16:04 2014 -0700 |
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# |
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# Save/restore bound registers in _dl_runtime_resolve |
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# |
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# This patch saves and restores bound registers in symbol lookup for x86-64: |
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# |
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# 1. Branches without BND prefix clear bound registers. |
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# 2. x86-64 pass bounds in bound registers as specified in MPX psABI |
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# extension on hjl/mpx/master branch at |
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# |
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# https://github.com/hjl-tools/x86-64-psABI |
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# https://groups.google.com/forum/#!topic/x86-64-abi/KFsB0XTgWYc |
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# |
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# Binutils has been updated to create an alternate PLT to add BND prefix |
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# when branching to ld.so. |
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# |
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# * config.h.in (HAVE_MPX_SUPPORT): New #undef. |
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# * sysdeps/x86_64/configure.ac: Set HAVE_MPX_SUPPORT. |
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# * sysdeps/x86_64/configure: Regenerated. |
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# * sysdeps/x86_64/dl-trampoline.S (REGISTER_SAVE_AREA): New |
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# macro. |
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# (REGISTER_SAVE_RAX): Likewise. |
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# (REGISTER_SAVE_RCX): Likewise. |
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# (REGISTER_SAVE_RDX): Likewise. |
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# (REGISTER_SAVE_RSI): Likewise. |
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# (REGISTER_SAVE_RDI): Likewise. |
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# (REGISTER_SAVE_R8): Likewise. |
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# (REGISTER_SAVE_R9): Likewise. |
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# (REGISTER_SAVE_BND0): Likewise. |
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# (REGISTER_SAVE_BND1): Likewise. |
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# (REGISTER_SAVE_BND2): Likewise. |
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# (_dl_runtime_resolve): Use them. Save and restore Intel MPX |
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# bound registers when calling _dl_fixup. |
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# |
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diff -urN glibc-2.17-c758a686/config.h.in glibc-2.17-c758a686/config.h.in |
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--- glibc-2.17-c758a686/config.h.in 2014-09-10 23:26:03.467045808 -0400 |
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+++ glibc-2.17-c758a686/config.h.in 2014-09-10 23:27:41.532851928 -0400 |
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@@ -107,6 +107,9 @@ |
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/* Define if assembler supports AVX512. */ |
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#undef HAVE_AVX512_ASM_SUPPORT |
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|
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+/* Define if assembler supports Intel MPX. */ |
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+#undef HAVE_MPX_SUPPORT |
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+ |
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/* Define if gcc supports FMA4. */ |
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#undef HAVE_FMA4_SUPPORT |
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diff -urN glibc-2.17-c758a686/sysdeps/x86/bits/link.h glibc-2.17-c758a686/sysdeps/x86/bits/link.h |
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--- glibc-2.17-c758a686/sysdeps/x86/bits/link.h 2014-09-10 23:26:03.467045808 -0400 |
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+++ glibc-2.17-c758a686/sysdeps/x86/bits/link.h 2014-09-10 23:27:41.533851926 -0400 |
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@@ -93,6 +93,9 @@ |
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uint64_t lr_rsp; |
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La_x86_64_xmm lr_xmm[8]; |
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La_x86_64_vector lr_vector[8]; |
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+#ifndef __ILP32__ |
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+ __int128 lr_bnd[4]; |
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+#endif |
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} La_x86_64_regs; |
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|
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/* Return values for calls from PLT on x86-64. */ |
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@@ -106,6 +109,10 @@ |
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long double lrv_st1; |
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La_x86_64_vector lrv_vector0; |
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La_x86_64_vector lrv_vector1; |
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+#ifndef __ILP32__ |
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+ __int128 lrv_bnd0; |
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+ __int128 lrv_bnd1; |
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+#endif |
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} La_x86_64_retval; |
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|
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#define La_x32_regs La_x86_64_regs |
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diff -urN glibc-2.17-c758a686/sysdeps/x86_64/configure glibc-2.17-c758a686/sysdeps/x86_64/configure |
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--- glibc-2.17-c758a686/sysdeps/x86_64/configure 2014-09-10 23:26:03.573045598 -0400 |
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+++ glibc-2.17-c758a686/sysdeps/x86_64/configure 2014-09-10 23:27:41.532851928 -0400 |
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@@ -212,6 +212,33 @@ |
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{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_cc_novzeroupper" >&5 |
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$as_echo "$libc_cv_cc_novzeroupper" >&6; } |
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|
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+{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for Intel MPX support" >&5 |
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+$as_echo_n "checking for Intel MPX support... " >&6; } |
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+if ${libc_cv_asm_mpx+:} false; then : |
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+ $as_echo_n "(cached) " >&6 |
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+else |
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+ cat > conftest.s <<\EOF |
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+ bndmov %bnd0,(%rsp) |
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+EOF |
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+if { ac_try='${CC-cc} -c $ASFLAGS conftest.s 1>&5' |
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+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5 |
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+ (eval $ac_try) 2>&5 |
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+ ac_status=$? |
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+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5 |
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+ test $ac_status = 0; }; }; then |
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+ libc_cv_asm_mpx=yes |
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+else |
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+ libc_cv_asm_mpx=no |
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+fi |
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+rm -f conftest* |
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+fi |
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+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_asm_mpx" >&5 |
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+$as_echo "$libc_cv_asm_mpx" >&6; } |
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+if test $libc_cv_asm_mpx == yes; then |
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+ $as_echo "#define HAVE_MPX_SUPPORT 1" >>confdefs.h |
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+ |
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+fi |
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+ |
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$as_echo "#define PI_STATIC_AND_HIDDEN 1" >>confdefs.h |
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|
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# work around problem with autoconf and empty lines at the end of files |
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diff -urN glibc-2.17-c758a686/sysdeps/x86_64/configure.in glibc-2.17-c758a686/sysdeps/x86_64/configure.in |
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--- glibc-2.17-c758a686/sysdeps/x86_64/configure.in 2014-09-10 23:26:03.468045806 -0400 |
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+++ glibc-2.17-c758a686/sysdeps/x86_64/configure.in 2014-09-10 23:27:41.532851928 -0400 |
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@@ -70,6 +70,21 @@ |
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[libc_cv_cc_novzeroupper=no]) |
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]) |
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+dnl Check whether asm supports Intel MPX |
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+AC_CACHE_CHECK(for Intel MPX support, libc_cv_asm_mpx, [dnl |
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+cat > conftest.s <<\EOF |
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+ bndmov %bnd0,(%rsp) |
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+EOF |
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+if AC_TRY_COMMAND(${CC-cc} -c $ASFLAGS conftest.s 1>&AS_MESSAGE_LOG_FD); then |
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+ libc_cv_asm_mpx=yes |
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+else |
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+ libc_cv_asm_mpx=no |
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+fi |
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+rm -f conftest*]) |
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+if test $libc_cv_asm_mpx == yes; then |
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+ AC_DEFINE(HAVE_MPX_SUPPORT) |
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+fi |
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+ |
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dnl It is always possible to access static and hidden symbols in an |
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dnl position independent way. |
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AC_DEFINE(PI_STATIC_AND_HIDDEN) |
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diff -urN glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.h glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.h |
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--- glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.h 2014-09-10 23:26:03.468045806 -0400 |
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+++ glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.h 2014-09-10 23:27:41.535851922 -0400 |
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@@ -63,6 +63,20 @@ |
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movaps (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp), %xmm6 |
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movaps (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp), %xmm7 |
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+#ifndef __ILP32__ |
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+# ifdef HAVE_MPX_SUPPORT |
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+ bndmov (LR_BND_OFFSET)(%rsp), %bnd0 # Restore bound |
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+ bndmov (LR_BND_OFFSET + BND_SIZE)(%rsp), %bnd1 # registers. |
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+ bndmov (LR_BND_OFFSET + BND_SIZE*2)(%rsp), %bnd2 |
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+ bndmov (LR_BND_OFFSET + BND_SIZE*3)(%rsp), %bnd3 |
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+# else |
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+ .byte 0x66,0x0f,0x1a,0x84,0x24;.long (LR_BND_OFFSET) |
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+ .byte 0x66,0x0f,0x1a,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE) |
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+ .byte 0x66,0x0f,0x1a,0x94,0x24;.long (LR_BND_OFFSET + BND_SIZE*2) |
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+ .byte 0x66,0x0f,0x1a,0x9c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3) |
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+# endif |
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+#endif |
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+ |
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#ifdef RESTORE_AVX |
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/* Check if any xmm0-xmm7 registers are changed by audit |
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module. */ |
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@@ -222,6 +236,16 @@ |
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vmovdqa %xmm1, (LRV_SIZE + XMM_SIZE)(%rcx) |
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#endif |
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+#ifndef __ILP32__ |
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+# ifdef HAVE_MPX_SUPPORT |
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+ bndmov %bnd0, LRV_BND0_OFFSET(%rcx) # Preserve returned bounds. |
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+ bndmov %bnd1, LRV_BND1_OFFSET(%rcx) |
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+# else |
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+ .byte 0x66,0x0f,0x1b,0x81;.long (LRV_BND0_OFFSET) |
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+ .byte 0x66,0x0f,0x1b,0x89;.long (LRV_BND1_OFFSET) |
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+# endif |
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+#endif |
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+ |
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fstpt LRV_ST0_OFFSET(%rcx) |
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fstpt LRV_ST1_OFFSET(%rcx) |
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@@ -254,6 +278,16 @@ |
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1: |
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#endif |
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+#ifndef __ILP32__ |
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+# ifdef HAVE_MPX_SUPPORT |
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+ bndmov LRV_BND0_OFFSET(%rcx), %bnd0 # Restore bound registers. |
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+ bndmov LRV_BND1_OFFSET(%rcx), %bnd1 |
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+# else |
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+ .byte 0x66,0x0f,0x1a,0x81;.long (LRV_BND0_OFFSET) |
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+ .byte 0x66,0x0f,0x1a,0x89;.long (LRV_BND1_OFFSET) |
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+# endif |
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+#endif |
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+ |
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fldt LRV_ST1_OFFSET(%rsp) |
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fldt LRV_ST0_OFFSET(%rsp) |
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|
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diff -urN glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.S glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.S |
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--- glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.S 2014-09-10 23:26:03.468045806 -0400 |
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+++ glibc-2.17-c758a686/sysdeps/x86_64/dl-trampoline.S 2014-09-10 23:27:41.534851924 -0400 |
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@@ -24,6 +24,30 @@ |
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# error RTLD_SAVESPACE_SSE must be aligned to 32 bytes |
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#endif |
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|
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+/* Area on stack to save and restore registers used for parameter |
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+ passing when calling _dl_fixup. */ |
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+#ifdef __ILP32__ |
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+/* X32 saves RCX, RDX, RSI, RDI, R8 and R9 plus RAX. */ |
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+# define REGISTER_SAVE_AREA (8 * 7) |
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+# define REGISTER_SAVE_RAX 0 |
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+#else |
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+/* X86-64 saves RCX, RDX, RSI, RDI, R8 and R9 plus RAX as well as BND0, |
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+ BND1, BND2, BND3. */ |
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+# define REGISTER_SAVE_AREA (8 * 7 + 16 * 4) |
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+/* Align bound register save area to 16 bytes. */ |
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+# define REGISTER_SAVE_BND0 0 |
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+# define REGISTER_SAVE_BND1 (REGISTER_SAVE_BND0 + 16) |
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+# define REGISTER_SAVE_BND2 (REGISTER_SAVE_BND1 + 16) |
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+# define REGISTER_SAVE_BND3 (REGISTER_SAVE_BND2 + 16) |
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+# define REGISTER_SAVE_RAX (REGISTER_SAVE_BND3 + 16) |
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+#endif |
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+#define REGISTER_SAVE_RCX (REGISTER_SAVE_RAX + 8) |
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+#define REGISTER_SAVE_RDX (REGISTER_SAVE_RCX + 8) |
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+#define REGISTER_SAVE_RSI (REGISTER_SAVE_RDX + 8) |
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+#define REGISTER_SAVE_RDI (REGISTER_SAVE_RSI + 8) |
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+#define REGISTER_SAVE_R8 (REGISTER_SAVE_RDI + 8) |
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+#define REGISTER_SAVE_R9 (REGISTER_SAVE_R8 + 8) |
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+ |
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.text |
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.globl _dl_runtime_resolve |
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.type _dl_runtime_resolve, @function |
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@@ -31,28 +55,63 @@ |
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cfi_startproc |
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_dl_runtime_resolve: |
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cfi_adjust_cfa_offset(16) # Incorporate PLT |
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- subq $56,%rsp |
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- cfi_adjust_cfa_offset(56) |
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- movq %rax,(%rsp) # Preserve registers otherwise clobbered. |
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- movq %rcx, 8(%rsp) |
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- movq %rdx, 16(%rsp) |
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- movq %rsi, 24(%rsp) |
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- movq %rdi, 32(%rsp) |
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- movq %r8, 40(%rsp) |
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- movq %r9, 48(%rsp) |
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- movq 64(%rsp), %rsi # Copy args pushed by PLT in register. |
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- movq 56(%rsp), %rdi # %rdi: link_map, %rsi: reloc_index |
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+ subq $REGISTER_SAVE_AREA,%rsp |
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+ cfi_adjust_cfa_offset(REGISTER_SAVE_AREA) |
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+ # Preserve registers otherwise clobbered. |
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+ movq %rax, REGISTER_SAVE_RAX(%rsp) |
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+ movq %rcx, REGISTER_SAVE_RCX(%rsp) |
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+ movq %rdx, REGISTER_SAVE_RDX(%rsp) |
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+ movq %rsi, REGISTER_SAVE_RSI(%rsp) |
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+ movq %rdi, REGISTER_SAVE_RDI(%rsp) |
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+ movq %r8, REGISTER_SAVE_R8(%rsp) |
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+ movq %r9, REGISTER_SAVE_R9(%rsp) |
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+#ifndef __ILP32__ |
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+ # We also have to preserve bound registers. These are nops if |
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+ # Intel MPX isn't available or disabled. |
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+# ifdef HAVE_MPX_SUPPORT |
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+ bndmov %bnd0, REGISTER_SAVE_BND0(%rsp) |
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+ bndmov %bnd1, REGISTER_SAVE_BND1(%rsp) |
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+ bndmov %bnd2, REGISTER_SAVE_BND2(%rsp) |
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+ bndmov %bnd3, REGISTER_SAVE_BND3(%rsp) |
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+# else |
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+ .byte 0x66,0x0f,0x1b,0x44,0x24,REGISTER_SAVE_BND0 |
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+ .byte 0x66,0x0f,0x1b,0x4c,0x24,REGISTER_SAVE_BND1 |
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+ .byte 0x66,0x0f,0x1b,0x54,0x24,REGISTER_SAVE_BND2 |
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+ .byte 0x66,0x0f,0x1b,0x5c,0x24,REGISTER_SAVE_BND3 |
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+# endif |
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+#endif |
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+ # Copy args pushed by PLT in register. |
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+ # %rdi: link_map, %rsi: reloc_index |
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+ movq (REGISTER_SAVE_AREA + 8)(%rsp), %rsi |
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+ movq REGISTER_SAVE_AREA(%rsp), %rdi |
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call _dl_fixup # Call resolver. |
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movq %rax, %r11 # Save return value |
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- movq 48(%rsp), %r9 # Get register content back. |
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- movq 40(%rsp), %r8 |
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- movq 32(%rsp), %rdi |
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- movq 24(%rsp), %rsi |
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- movq 16(%rsp), %rdx |
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- movq 8(%rsp), %rcx |
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- movq (%rsp), %rax |
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- addq $72, %rsp # Adjust stack(PLT did 2 pushes) |
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- cfi_adjust_cfa_offset(-72) |
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+#ifndef __ILP32__ |
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+ # Restore bound registers. These are nops if Intel MPX isn't |
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+ # avaiable or disabled. |
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+# ifdef HAVE_MPX_SUPPORT |
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+ bndmov REGISTER_SAVE_BND3(%rsp), %bnd3 |
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+ bndmov REGISTER_SAVE_BND2(%rsp), %bnd2 |
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+ bndmov REGISTER_SAVE_BND1(%rsp), %bnd1 |
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+ bndmov REGISTER_SAVE_BND0(%rsp), %bnd0 |
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+# else |
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+ .byte 0x66,0x0f,0x1a,0x5c,0x24,REGISTER_SAVE_BND3 |
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+ .byte 0x66,0x0f,0x1a,0x54,0x24,REGISTER_SAVE_BND2 |
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+ .byte 0x66,0x0f,0x1a,0x4c,0x24,REGISTER_SAVE_BND1 |
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+ .byte 0x66,0x0f,0x1a,0x44,0x24,REGISTER_SAVE_BND0 |
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+# endif |
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+#endif |
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+ # Get register content back. |
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+ movq REGISTER_SAVE_R9(%rsp), %r9 |
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+ movq REGISTER_SAVE_R8(%rsp), %r8 |
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+ movq REGISTER_SAVE_RDI(%rsp), %rdi |
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+ movq REGISTER_SAVE_RSI(%rsp), %rsi |
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+ movq REGISTER_SAVE_RDX(%rsp), %rdx |
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+ movq REGISTER_SAVE_RCX(%rsp), %rcx |
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+ movq REGISTER_SAVE_RAX(%rsp), %rax |
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+ # Adjust stack(PLT did 2 pushes) |
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+ addq $(REGISTER_SAVE_AREA + 16), %rsp |
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+ cfi_adjust_cfa_offset(-(REGISTER_SAVE_AREA + 16)) |
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jmp *%r11 # Jump to function address. |
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cfi_endproc |
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.size _dl_runtime_resolve, .-_dl_runtime_resolve |
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@@ -130,6 +189,20 @@ |
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movaps %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp) |
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movaps %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp) |
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|
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+# ifndef __ILP32__ |
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+# ifdef HAVE_MPX_SUPPORT |
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+ bndmov %bnd0, (LR_BND_OFFSET)(%rsp) # Preserve bound |
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+ bndmov %bnd1, (LR_BND_OFFSET + BND_SIZE)(%rsp) # registers. Nops if |
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+ bndmov %bnd2, (LR_BND_OFFSET + BND_SIZE*2)(%rsp) # MPX not available |
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+ bndmov %bnd3, (LR_BND_OFFSET + BND_SIZE*3)(%rsp) # or disabled. |
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+# else |
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+ .byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET) |
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+ .byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE) |
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+ .byte 0x66,0x0f,0x1b,0x84,0x24;.long (LR_BND_OFFSET + BND_SIZE*2) |
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+ .byte 0x66,0x0f,0x1b,0x8c,0x24;.long (LR_BND_OFFSET + BND_SIZE*3) |
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+# endif |
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+# endif |
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+ |
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# if defined HAVE_AVX_SUPPORT || defined HAVE_AVX512_ASM_SUPPORT |
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.data |
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L(have_avx): |
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diff -urN glibc-2.17-c758a686/sysdeps/x86_64/link-defines.sym glibc-2.17-c758a686/sysdeps/x86_64/link-defines.sym |
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--- glibc-2.17-c758a686/sysdeps/x86_64/link-defines.sym 2014-09-10 23:26:03.468045806 -0400 |
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+++ glibc-2.17-c758a686/sysdeps/x86_64/link-defines.sym 2014-09-10 23:27:41.535851922 -0400 |
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@@ -6,6 +6,7 @@ |
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XMM_SIZE sizeof (La_x86_64_xmm) |
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YMM_SIZE sizeof (La_x86_64_ymm) |
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ZMM_SIZE sizeof (La_x86_64_zmm) |
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+BND_SIZE sizeof (__int128) |
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|
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LR_SIZE sizeof (struct La_x86_64_regs) |
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LR_RDX_OFFSET offsetof (struct La_x86_64_regs, lr_rdx) |
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@@ -18,6 +19,9 @@ |
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LR_RSP_OFFSET offsetof (struct La_x86_64_regs, lr_rsp) |
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LR_XMM_OFFSET offsetof (struct La_x86_64_regs, lr_xmm) |
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LR_VECTOR_OFFSET offsetof (struct La_x86_64_regs, lr_vector) |
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+#ifndef __ILP32__ |
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+LR_BND_OFFSET offsetof (struct La_x86_64_regs, lr_bnd) |
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+#endif |
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LRV_SIZE sizeof (struct La_x86_64_retval) |
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LRV_RAX_OFFSET offsetof (struct La_x86_64_retval, lrv_rax) |
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@@ -28,3 +32,7 @@ |
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LRV_ST1_OFFSET offsetof (struct La_x86_64_retval, lrv_st1) |
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LRV_VECTOR0_OFFSET offsetof (struct La_x86_64_retval, lrv_vector0) |
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LRV_VECTOR1_OFFSET offsetof (struct La_x86_64_retval, lrv_vector1) |
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+#ifndef __ILP32__ |
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+LRV_BND0_OFFSET offsetof (struct La_x86_64_retval, lrv_bnd0) |
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+LRV_BND1_OFFSET offsetof (struct La_x86_64_retval, lrv_bnd1) |
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+#endif
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