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513 lines
14 KiB
513 lines
14 KiB
From fabf4e24731762be7ed1fded89b536fe7150fe13 Mon Sep 17 00:00:00 2001 |
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From: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> |
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Date: Tue, 13 Dec 2016 10:53:42 +0530 |
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Subject: [PATCH] powerpc: strncmp optimization for power9 |
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Vectorized loops are used for strings > 32B when compared |
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to power8 optimization. |
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Tested on power9 ppc64le simulator. |
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|
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(cherry picked from commit d89060d60307c84995177a6fba2ed80c96f6b914) |
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Conflicts: |
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sysdeps/powerpc/powerpc64/multiarch/strncmp.c |
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--- |
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ChangeLog | 11 + |
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sysdeps/powerpc/powerpc64/multiarch/Makefile | 3 +- |
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.../powerpc/powerpc64/multiarch/ifunc-impl-list.c | 2 + |
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.../powerpc/powerpc64/multiarch/strncmp-power9.S | 40 +++ |
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sysdeps/powerpc/powerpc64/multiarch/strncmp.c | 17 +- |
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sysdeps/powerpc/powerpc64/power9/strncmp.S | 375 +++++++++++++++++++++ |
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6 files changed, 440 insertions(+), 8 deletions(-) |
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create mode 100644 sysdeps/powerpc/powerpc64/multiarch/strncmp-power9.S |
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create mode 100644 sysdeps/powerpc/powerpc64/power9/strncmp.S |
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|
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diff --git a/ChangeLog b/ChangeLog |
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index 57152b8..0446268 100644 |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/Makefile b/sysdeps/powerpc/powerpc64/multiarch/Makefile |
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index 2c83c22..2997b9d 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/Makefile |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/Makefile |
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@@ -8,7 +8,8 @@ sysdep_routines += memcpy-power7 memcpy-a2 memcpy-power6 memcpy-cell \ |
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rawmemchr-ppc64 strlen-power7 strlen-ppc64 strnlen-power7 \ |
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strnlen-ppc64 strcasecmp-power7 strcasecmp_l-power7 \ |
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strncase-power7 strncase_l-power7 \ |
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- strncmp-power8 strncmp-power7 strncmp-power4 strncmp-ppc64 \ |
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+ strncmp-power9 strncmp-power8 strncmp-power7 \ |
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+ strncmp-power4 strncmp-ppc64 \ |
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strchr-power7 strchr-ppc64 \ |
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strchrnul-power7 strchrnul-ppc64 wcschr-power7 \ |
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wcschr-power6 wcschr-ppc64 wcsrchr-power7 wcsrchr-power6 \ |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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index 404a226..a140583 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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@@ -110,6 +110,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, |
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/* Support sysdeps/powerpc/powerpc64/multiarch/strncmp.c. */ |
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IFUNC_IMPL (i, name, strncmp, |
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+ IFUNC_IMPL_ADD (array, i, strncmp, hwcap2 & PPC_FEATURE2_ARCH_3_00, |
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+ __strncmp_power9) |
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IFUNC_IMPL_ADD (array, i, strncmp, hwcap2 & PPC_FEATURE2_ARCH_2_07, |
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__strncmp_power8) |
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IFUNC_IMPL_ADD (array, i, strncmp, hwcap & PPC_FEATURE_HAS_VSX, |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncmp-power9.S b/sysdeps/powerpc/powerpc64/multiarch/strncmp-power9.S |
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new file mode 100644 |
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index 0000000..2f8d0c4 |
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--- /dev/null |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/strncmp-power9.S |
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@@ -0,0 +1,40 @@ |
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+/* Copyright (C) 2016 Free Software Foundation, Inc. |
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+ This file is part of the GNU C Library. |
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+ |
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+ The GNU C Library is free software; you can redistribute it and/or |
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+ modify it under the terms of the GNU Lesser General Public |
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+ License as published by the Free Software Foundation; either |
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+ version 2.1 of the License, or (at your option) any later version. |
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+ |
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+ The GNU C Library is distributed in the hope that it will be useful, |
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of |
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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+ Lesser General Public License for more details. |
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+ |
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+ You should have received a copy of the GNU Lesser General Public |
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+ License along with the GNU C Library; if not, see |
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+ <http://www.gnu.org/licenses/>. */ |
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+ |
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+#include <sysdep.h> |
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+ |
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+#undef EALIGN |
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+#define EALIGN(name,alignt,words) \ |
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+ .section ".text"; \ |
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+ ENTRY_2(__strncmp_power9) \ |
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+ .align ALIGNARG(alignt); \ |
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+ EALIGN_W_##words; \ |
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+ BODY_LABEL(__strncmp_power9): \ |
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+ cfi_startproc; \ |
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+ LOCALENTRY(__strncmp_power9) |
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+ |
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+#undef END |
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+#define END(name) \ |
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+ cfi_endproc; \ |
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+ TRACEBACK(__strncmp_power9) \ |
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+ END_2(__strncmp_power9) |
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+ |
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+ |
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+#undef libc_hidden_builtin_def |
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+#define libc_hidden_builtin_def(name) |
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+ |
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+#include <sysdeps/powerpc/powerpc64/power9/strncmp.S> |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c |
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index 9b6a659..3859cbc 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c |
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@@ -26,15 +26,18 @@ extern __typeof (strncmp) __strncmp_ppc attribute_hidden; |
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extern __typeof (strncmp) __strncmp_power4 attribute_hidden; |
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extern __typeof (strncmp) __strncmp_power7 attribute_hidden; |
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extern __typeof (strncmp) __strncmp_power8 attribute_hidden; |
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+extern __typeof (strncmp) __strncmp_power9 attribute_hidden; |
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|
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/* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle |
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ifunc symbol properly. */ |
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libc_ifunc (strncmp, |
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- (hwcap2 & PPC_FEATURE2_ARCH_2_07) |
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- ? __strncmp_power8 : |
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- (hwcap & PPC_FEATURE_HAS_VSX) |
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- ? __strncmp_power7 : |
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- (hwcap & PPC_FEATURE_POWER4) |
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- ? __strncmp_power4 |
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- : __strncmp_ppc); |
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+ (hwcap2 & PPC_FEATURE2_ARCH_3_00) |
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+ ? __strncmp_power9 : |
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+ (hwcap2 & PPC_FEATURE2_ARCH_2_07) |
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+ ? __strncmp_power8 : |
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+ (hwcap & PPC_FEATURE_HAS_VSX) |
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+ ? __strncmp_power7 : |
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+ (hwcap & PPC_FEATURE_POWER4) |
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+ ? __strncmp_power4 |
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+ : __strncmp_ppc); |
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#endif |
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diff --git a/sysdeps/powerpc/powerpc64/power9/strncmp.S b/sysdeps/powerpc/powerpc64/power9/strncmp.S |
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new file mode 100644 |
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index 0000000..3f2fa75 |
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--- /dev/null |
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+++ b/sysdeps/powerpc/powerpc64/power9/strncmp.S |
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@@ -0,0 +1,375 @@ |
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+/* Optimized strncmp implementation for PowerPC64/POWER9. |
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+ Copyright (C) 2016 Free Software Foundation, Inc. |
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+ This file is part of the GNU C Library. |
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+ |
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+ The GNU C Library is free software; you can redistribute it and/or |
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+ modify it under the terms of the GNU Lesser General Public |
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+ License as published by the Free Software Foundation; either |
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+ version 2.1 of the License, or (at your option) any later version. |
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+ |
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+ The GNU C Library is distributed in the hope that it will be useful, |
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of |
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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+ Lesser General Public License for more details. |
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+ |
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+ You should have received a copy of the GNU Lesser General Public |
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+ License along with the GNU C Library; if not, see |
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+ <http://www.gnu.org/licenses/>. */ |
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+#ifdef __LITTLE_ENDIAN__ |
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+#include <sysdep.h> |
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+ |
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+/* Implements the function |
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+ |
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+ int [r3] strncmp (const char *s1 [r3], const char *s2 [r4], size_t [r5] n) |
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+ |
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+ The implementation uses unaligned doubleword access to avoid specialized |
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+ code paths depending of data alignment for first 32 bytes and uses |
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+ vectorised loops after that. */ |
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+ |
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+/* TODO: Change this to actual instructions when minimum binutils is upgraded |
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+ to 2.27. Macros are defined below for these newer instructions in order |
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+ to maintain compatibility. */ |
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+# define VCTZLSBB(r,v) .long (0x10010602 | ((r)<<(32-11)) | ((v)<<(32-21))) |
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+ |
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+# define VEXTUBRX(t,a,b) .long (0x1000070d \ |
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+ | ((t)<<(32-11)) \ |
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+ | ((a)<<(32-16)) \ |
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+ | ((b)<<(32-21)) ) |
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+ |
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+# define VCMPNEZB(t,a,b) .long (0x10000507 \ |
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+ | ((t)<<(32-11)) \ |
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+ | ((a)<<(32-16)) \ |
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+ | ((b)<<(32-21)) ) |
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+ |
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+/* Get 16 bytes for unaligned case. |
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+ reg1: Vector to hold next 16 bytes. |
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+ reg2: Address to read from. |
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+ reg3: Permute control vector. */ |
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+# define GET16BYTES(reg1, reg2, reg3) \ |
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+ lvx reg1, 0, reg2; \ |
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+ vperm v8, v2, reg1, reg3; \ |
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+ vcmpequb. v8, v0, v8; \ |
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+ beq cr6, 1f; \ |
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+ vspltisb v9, 0; \ |
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+ b 2f; \ |
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+ .align 4; \ |
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+1: \ |
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+ cmplw cr6, r5, r11; \ |
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+ ble cr6, 2f; \ |
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+ addi r6, reg2, 16; \ |
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+ lvx v9, 0, r6; \ |
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+2: \ |
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+ vperm reg1, v9, reg1, reg3; |
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+ |
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+/* TODO: change this to .machine power9 when minimum binutils |
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+ is upgraded to 2.27. */ |
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+ .machine power7 |
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+EALIGN (strncmp, 4, 0) |
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+ /* Check if size is 0. */ |
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+ cmpdi cr0, r5, 0 |
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+ beq cr0, L(ret0) |
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+ li r0, 0 |
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+ |
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+ /* Check if [s1]+32 or [s2]+32 will cross a 4K page boundary using |
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+ the code: |
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+ |
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+ (((size_t) s1) % PAGE_SIZE > (PAGE_SIZE - ITER_SIZE)) |
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+ |
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+ with PAGE_SIZE being 4096 and ITER_SIZE begin 32. */ |
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+ rldicl r8, r3, 0, 52 |
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+ cmpldi cr7, r8, 4096-32 |
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+ bgt cr7, L(pagecross) |
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+ rldicl r9, r4, 0, 52 |
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+ cmpldi cr7, r9, 4096-32 |
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+ bgt cr7, L(pagecross) |
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+ |
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+ /* For short strings up to 32 bytes, load both s1 and s2 using |
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+ unaligned dwords and compare. */ |
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+ |
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+ ld r7, 0(r3) |
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+ ld r9, 0(r4) |
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+ li r8, 0 |
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+ cmpb r8, r7, r8 |
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+ cmpb r6, r7, r9 |
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+ orc. r8, r8, r6 |
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+ bne cr0, L(different1) |
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+ |
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+ /* If the strings compared are equal, but size is less or equal |
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+ to 8, return 0. */ |
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+ cmpldi cr7, r5, 8 |
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+ li r9, 0 |
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+ ble cr7, L(ret1) |
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+ addi r5, r5, -8 |
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+ |
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+ ld r7, 8(r3) |
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+ ld r9, 8(r4) |
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+ cmpb r8, r7, r8 |
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+ cmpb r6, r7, r9 |
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+ orc. r8, r8, r6 |
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+ bne cr0, L(different1) |
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+ cmpldi cr7, r5, 8 |
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+ mr r9, r8 |
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+ ble cr7, L(ret1) |
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+ /* Update pointers and size. */ |
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+ addi r5, r5, -8 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ |
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+ ld r7, 0(r3) |
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+ ld r9, 0(r4) |
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+ li r8, 0 |
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+ cmpb r8, r7, r8 |
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+ cmpb r6, r7, r9 |
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+ orc. r8, r8, r6 |
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+ bne cr0, L(different1) |
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+ cmpldi cr7, r5, 8 |
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+ li r9, 0 |
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+ ble cr7, L(ret1) |
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+ addi r5, r5, -8 |
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+ |
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+ ld r7, 8(r3) |
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+ ld r9, 8(r4) |
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+ cmpb r8, r7, r8 |
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+ cmpb r6, r7, r9 |
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+ orc. r8, r8, r6 |
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+ bne cr0, L(different1) |
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+ cmpldi cr7, r5, 8 |
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+ mr r9, r8 |
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+ ble cr7, L(ret1) |
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+ |
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+ /* Update pointers and size. */ |
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+ addi r5, r5, -8 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+L(align): |
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+ /* Now it has checked for first 32 bytes, align source1 to doubleword |
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+ and adjust source2 address. */ |
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+ vspltisb v0, 0 |
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+ vspltisb v2, -1 |
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+ or r6, r4, r3 |
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+ andi. r6, r6, 0xF |
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+ beq cr0, L(aligned) |
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+ lvsr v6, 0, r4 /* Compute mask. */ |
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+ clrldi r6, r4, 60 |
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+ subfic r11, r6, 16 |
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+ andi. r6, r3, 0xF |
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+ beq cr0, L(s1_align) |
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+ /* Both s1 and s2 are unaligned. */ |
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+ GET16BYTES(v5, r4, v6) |
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+ lvsr v10, 0, r3 /* Compute mask. */ |
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+ clrldi r6, r3, 60 |
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+ subfic r11, r6, 16 |
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+ GET16BYTES(v4, r3, v10) |
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+ VCMPNEZB(v7, v5, v4) |
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+ beq cr6, L(match) |
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+ b L(different) |
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+ |
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+ /* Align s1 to qw and adjust s2 address. */ |
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+ .align 4 |
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+L(match): |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ subf r5, r11, r5 |
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+ add r3, r3, r11 |
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+ add r4, r4, r11 |
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+ andi. r11, r4, 0xF |
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+ beq cr0, L(aligned) |
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+ lvsr v6, 0, r4 |
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+ clrldi r6, r4, 60 |
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+ subfic r11, r6, 16 |
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+ /* There are 2 loops depending on the input alignment. |
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+ Each loop gets 16 bytes from s1 and s2, checks for null |
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+ and compares them. Loops until a mismatch or null occurs. */ |
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+L(s1_align): |
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+ lvx v4, 0, r3 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ |
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+ lvx v4, 0, r3 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ |
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+ lvx v4, 0, r3 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ |
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+ lvx v4, 0, r3 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ b L(s1_align) |
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+ .align 4 |
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+L(aligned): |
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+ lvx v4, 0, r3 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ |
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+ lvx v4, 0, r3 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ |
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+ lvx v4, 0, r3 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ |
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+ lvx v4, 0, r3 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ bne cr6, L(different) |
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+ cmpldi cr7, r5, 16 |
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+ ble cr7, L(ret0) |
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+ addi r5, r5, -16 |
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+ addi r3, r3, 16 |
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+ addi r4, r4, 16 |
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+ b L(aligned) |
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+ /* Calculate and return the difference. */ |
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+L(different): |
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+ VCTZLSBB(r6, v7) |
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+ cmplw cr7, r5, r6 |
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+ ble cr7, L(ret0) |
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+ VEXTUBRX(r5, r6, v4) |
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+ VEXTUBRX(r4, r6, v5) |
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+ subf r3, r4, r5 |
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+ extsw r3, r3 |
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+ blr |
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+ |
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+ .align 4 |
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+L(ret0): |
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+ li r9, 0 |
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+L(ret1): |
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+ mr r3, r9 |
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+ blr |
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+ |
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+ /* The code now checks if r8 and r5 are different by issuing a |
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+ cmpb and shifts the result based on its output: |
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+ |
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+ leadzero = (__builtin_ffsl (z1) - 1); |
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+ leadzero = leadzero > (n-1)*8 ? (n-1)*8 : leadzero; |
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+ r1 = (r1 >> leadzero) & 0xFFUL; |
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+ r2 = (r2 >> leadzero) & 0xFFUL; |
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+ return r1 - r2; */ |
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+ |
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+ .align 4 |
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+L(different1): |
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+ neg r11, r8 |
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+ sldi r5, r5, 3 |
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+ and r8, r11, r8 |
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+ addi r5, r5, -8 |
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+ cntlzd r8, r8 |
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+ subfic r8, r8, 63 |
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+ extsw r8, r8 |
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+ cmpld cr7, r8, r5 |
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+ ble cr7, L(different2) |
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+ mr r8, r5 |
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+L(different2): |
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+ extsw r8, r8 |
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+ srd r7, r7, r8 |
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+ srd r9, r9, r8 |
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+ rldicl r3, r7, 0, 56 |
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+ rldicl r9, r9, 0, 56 |
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+ subf r9, r9, 3 |
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+ extsw r9, r9 |
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+ mr r3, r9 |
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+ blr |
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+ |
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+ /* If unaligned 16 bytes reads across a 4K page boundary, it uses |
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+ a simple byte a byte comparison until the page alignment for s1 |
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+ is reached. */ |
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+ .align 4 |
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+L(pagecross): |
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+ lbz r7, 0(r3) |
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+ lbz r9, 0(r4) |
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+ subfic r8, r8,4095 |
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+ cmplw cr7, r9, r7 |
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+ bne cr7, L(byte_ne_3) |
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+ cmpdi cr7, r9, 0 |
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+ beq cr7, L(byte_ne_0) |
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+ addi r5, r5, -1 |
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+ subf r7, r8, r5 |
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+ subf r9, r7, r5 |
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+ addi r9, r9, 1 |
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+ mtctr r9 |
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+ b L(pagecross_loop1) |
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+ |
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+ .align 4 |
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+L(pagecross_loop0): |
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+ beq cr7, L(ret0) |
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+ lbz r9, 0(r3) |
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+ lbz r8, 0(r4) |
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+ addi r5, r5, -1 |
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+ cmplw cr7, r9, r8 |
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+ cmpdi cr5, r9, 0 |
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+ bne cr7, L(byte_ne_2) |
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+ beq cr5, L(byte_ne_0) |
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+L(pagecross_loop1): |
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+ cmpdi cr7, r5, 0 |
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+ addi r3, r3, 1 |
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+ addi r4, r4, 1 |
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+ bdnz L(pagecross_loop0) |
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+ cmpdi cr7, r7, 0 |
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+ li r9, 0 |
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+ bne+ cr7, L(align) |
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+ b L(ret1) |
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+ |
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+ .align 4 |
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+L(byte_ne_0): |
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+ li r7, 0 |
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+L(byte_ne_1): |
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+ subf r9, r9, r7 |
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+ extsw r9, r9 |
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+ b L(ret1) |
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+ |
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+ .align 4 |
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+L(byte_ne_2): |
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+ extsw r7, r9 |
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+ mr r9, r8 |
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+ b L(byte_ne_1) |
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+L(byte_ne_3): |
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+ extsw r7, r7 |
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+ b L(byte_ne_1) |
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+END(strncmp) |
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+libc_hidden_builtin_def(strncmp) |
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+#else |
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+#include <sysdeps/powerpc/powerpc64/power8/strncmp.S> |
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+#endif |
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-- |
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2.1.0
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