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410 lines
12 KiB
410 lines
12 KiB
From 1e5a0d609f20a613e1e989802bbe479f61bed1ca Mon Sep 17 00:00:00 2001 |
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From: Rajalakshmi Srinivasaraghavan <raji@linux.vnet.ibm.com> |
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Date: Thu, 1 Dec 2016 11:35:43 +0530 |
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Subject: [PATCH] powerpc: strcmp optimization for power9 |
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Vectorized loops are used for strings > 32B when compared |
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to power8 optimization. |
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Tested on power9 ppc64le simulator. |
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(cherry picked from commit 80ab6401a9bb566de940cc6a5fb7a6af650f17b9) |
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Conflicts: |
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sysdeps/powerpc/powerpc64/multiarch/strcmp.c |
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--- |
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ChangeLog | 11 + |
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sysdeps/powerpc/powerpc64/multiarch/Makefile | 2 +- |
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.../powerpc/powerpc64/multiarch/ifunc-impl-list.c | 3 + |
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.../powerpc/powerpc64/multiarch/strcmp-power9.S | 40 +++ |
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sysdeps/powerpc/powerpc64/multiarch/strcmp.c | 13 +- |
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sysdeps/powerpc/powerpc64/power9/strcmp.S | 278 +++++++++++++++++++++ |
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6 files changed, 341 insertions(+), 6 deletions(-) |
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create mode 100644 sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S |
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create mode 100644 sysdeps/powerpc/powerpc64/power9/strcmp.S |
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diff --git a/ChangeLog b/ChangeLog |
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index 6d6aab3..57152b8 100644 |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/Makefile b/sysdeps/powerpc/powerpc64/multiarch/Makefile |
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index e3ac285..2c83c22 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/Makefile |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/Makefile |
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@@ -16,7 +16,7 @@ sysdep_routines += memcpy-power7 memcpy-a2 memcpy-power6 memcpy-cell \ |
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strncase-ppc64 strncase-power8 \ |
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strcasestr-power8 strcasestr-ppc64 \ |
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strcat-power8 strcat-power7 strcat-ppc64 \ |
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- strcmp-power8 strcmp-power7 strcmp-ppc64 \ |
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+ strcmp-power9 strcmp-power8 strcmp-power7 strcmp-ppc64 \ |
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strcpy-power8 strcpy-power7 strcpy-ppc64 \ |
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strcspn-power8 strcspn-ppc64 \ |
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stpncpy-power8 stpncpy-power7 stpncpy-ppc64 \ |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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index aabd7bc..404a226 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c |
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@@ -311,6 +311,9 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, |
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/* Support sysdeps/powerpc/powerpc64/multiarch/strcmp.c. */ |
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IFUNC_IMPL (i, name, strcmp, |
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IFUNC_IMPL_ADD (array, i, strcmp, |
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+ hwcap2 & PPC_FEATURE2_ARCH_3_00, |
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+ __strcmp_power9) |
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+ IFUNC_IMPL_ADD (array, i, strcmp, |
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hwcap2 & PPC_FEATURE2_ARCH_2_07, |
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__strcmp_power8) |
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IFUNC_IMPL_ADD (array, i, strcmp, |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S b/sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S |
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new file mode 100644 |
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index 0000000..0a09e5b |
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--- /dev/null |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/strcmp-power9.S |
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@@ -0,0 +1,40 @@ |
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+/* Optimized strcmp implementation for POWER9/PPC64. |
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+ Copyright (C) 2016 Free Software Foundation, Inc. |
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+ This file is part of the GNU C Library. |
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+ |
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+ The GNU C Library is free software; you can redistribute it and/or |
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+ modify it under the terms of the GNU Lesser General Public |
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+ License as published by the Free Software Foundation; either |
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+ version 2.1 of the License, or (at your option) any later version. |
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+ |
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+ The GNU C Library is distributed in the hope that it will be useful, |
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of |
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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+ Lesser General Public License for more details. |
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+ |
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+ You should have received a copy of the GNU Lesser General Public |
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+ License along with the GNU C Library; if not, see |
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+ <http://www.gnu.org/licenses/>. */ |
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+ |
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+#include <sysdep.h> |
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+ |
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+#undef EALIGN |
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+#define EALIGN(name, alignt, words) \ |
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+ .section ".text"; \ |
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+ ENTRY_2(__strcmp_power9) \ |
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+ .align ALIGNARG(alignt); \ |
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+ EALIGN_W_##words; \ |
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+ BODY_LABEL(__strcmp_power9): \ |
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+ cfi_startproc; \ |
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+ LOCALENTRY(__strcmp_power9) |
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+ |
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+#undef END |
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+#define END(name) \ |
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+ cfi_endproc; \ |
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+ TRACEBACK(__strcmp_power9) \ |
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+ END_2(__strcmp_power9) |
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+ |
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+#undef libc_hidden_builtin_def |
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+#define libc_hidden_builtin_def(name) |
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+ |
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+#include <sysdeps/powerpc/powerpc64/power9/strcmp.S> |
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diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c |
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index b45ba1f..7345f5a 100644 |
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--- a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c |
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+++ b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c |
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@@ -24,11 +24,14 @@ |
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extern __typeof (strcmp) __strcmp_ppc attribute_hidden; |
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extern __typeof (strcmp) __strcmp_power7 attribute_hidden; |
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extern __typeof (strcmp) __strcmp_power8 attribute_hidden; |
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+extern __typeof (strcmp) __strcmp_power9 attribute_hidden; |
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libc_ifunc (strcmp, |
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- (hwcap2 & PPC_FEATURE2_ARCH_2_07) |
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- ? __strcmp_power8 : |
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- (hwcap & PPC_FEATURE_HAS_VSX) |
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- ? __strcmp_power7 |
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- : __strcmp_ppc); |
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+ (hwcap2 & PPC_FEATURE2_ARCH_3_00) |
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+ ? __strcmp_power9 : |
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+ (hwcap2 & PPC_FEATURE2_ARCH_2_07) |
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+ ? __strcmp_power8 : |
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+ (hwcap & PPC_FEATURE_HAS_VSX) |
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+ ? __strcmp_power7 |
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+ : __strcmp_ppc); |
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#endif |
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diff --git a/sysdeps/powerpc/powerpc64/power9/strcmp.S b/sysdeps/powerpc/powerpc64/power9/strcmp.S |
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new file mode 100644 |
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index 0000000..754d508 |
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--- /dev/null |
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+++ b/sysdeps/powerpc/powerpc64/power9/strcmp.S |
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@@ -0,0 +1,278 @@ |
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+/* Optimized strcmp implementation for PowerPC64/POWER9. |
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+ Copyright (C) 2016 Free Software Foundation, Inc. |
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+ This file is part of the GNU C Library. |
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+ |
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+ The GNU C Library is free software; you can redistribute it and/or |
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+ modify it under the terms of the GNU Lesser General Public |
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+ License as published by the Free Software Foundation; either |
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+ version 2.1 of the License, or (at your option) any later version. |
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+ |
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+ The GNU C Library is distributed in the hope that it will be useful, |
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+ but WITHOUT ANY WARRANTY; without even the implied warranty of |
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+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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+ Lesser General Public License for more details. |
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+ |
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+ You should have received a copy of the GNU Lesser General Public |
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+ License along with the GNU C Library; if not, see |
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+ <http://www.gnu.org/licenses/>. */ |
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+#ifdef __LITTLE_ENDIAN__ |
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+#include <sysdep.h> |
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+ |
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+/* Implements the function |
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+ |
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+ int [r3] strcmp (const char *s1 [r3], const char *s2 [r4]) |
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+ |
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+ The implementation uses unaligned doubleword access for first 32 bytes |
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+ as in POWER8 patch and uses vectorised loops after that. */ |
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+ |
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+/* TODO: Change this to actual instructions when minimum binutils is upgraded |
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+ to 2.27. Macros are defined below for these newer instructions in order |
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+ to maintain compatibility. */ |
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+# define VCTZLSBB(r,v) .long (0x10010602 | ((r)<<(32-11)) | ((v)<<(32-21))) |
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+ |
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+# define VEXTUBRX(t,a,b) .long (0x1000070d \ |
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+ | ((t)<<(32-11)) \ |
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+ | ((a)<<(32-16)) \ |
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+ | ((b)<<(32-21)) ) |
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+ |
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+# define VCMPNEZB(t,a,b) .long (0x10000507 \ |
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+ | ((t)<<(32-11)) \ |
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+ | ((a)<<(32-16)) \ |
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+ | ((b)<<(32-21)) ) |
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+ |
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+/* Get 16 bytes for unaligned case. |
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+ reg1: Vector to hold next 16 bytes. |
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+ reg2: Address to read from. |
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+ reg3: Permute control vector. */ |
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+# define GET16BYTES(reg1, reg2, reg3) \ |
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+ lvx reg1, 0, reg2; \ |
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+ vperm v8, v2, reg1, reg3; \ |
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+ vcmpequb. v8, v0, v8; \ |
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+ beq cr6, 1f; \ |
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+ vspltisb v9, 0; \ |
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+ b 2f; \ |
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+ .align 4; \ |
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+1: \ |
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+ addi r6, reg2, 16; \ |
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+ lvx v9, 0, r6; \ |
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+2: \ |
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+ vperm reg1, v9, reg1, reg3; |
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+ |
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+/* TODO: change this to .machine power9 when the minimum required binutils |
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+ allows it. */ |
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+ |
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+ .machine power7 |
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+EALIGN (strcmp, 4, 0) |
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+ li r0, 0 |
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+ |
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+ /* Check if [s1]+32 or [s2]+32 will cross a 4K page boundary using |
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+ the code: |
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+ |
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+ (((size_t) s1) % PAGE_SIZE > (PAGE_SIZE - ITER_SIZE)) |
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+ |
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+ with PAGE_SIZE being 4096 and ITER_SIZE begin 32. */ |
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+ |
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+ rldicl r7, r3, 0, 52 |
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+ rldicl r9, r4, 0, 52 |
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+ cmpldi cr7, r7, 4096-32 |
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+ bgt cr7, L(pagecross_check) |
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+ cmpldi cr5, r9, 4096-32 |
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+ bgt cr5, L(pagecross_check) |
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+ |
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+ /* For short strings up to 32 bytes, load both s1 and s2 using |
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+ unaligned dwords and compare. */ |
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+ ld r8, 0(r3) |
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+ ld r10, 0(r4) |
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+ cmpb r12, r8, r0 |
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+ cmpb r11, r8, r10 |
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+ orc. r9, r12, r11 |
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+ bne cr0, L(different_nocmpb) |
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+ |
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+ ld r8, 8(r3) |
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+ ld r10, 8(r4) |
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+ cmpb r12, r8, r0 |
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+ cmpb r11, r8, r10 |
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+ orc. r9, r12, r11 |
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+ bne cr0, L(different_nocmpb) |
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+ |
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+ ld r8, 16(r3) |
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+ ld r10, 16(r4) |
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+ cmpb r12, r8, r0 |
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+ cmpb r11, r8, r10 |
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+ orc. r9, r12, r11 |
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+ bne cr0, L(different_nocmpb) |
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+ |
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+ ld r8, 24(r3) |
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+ ld r10, 24(r4) |
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+ cmpb r12, r8, r0 |
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+ cmpb r11, r8, r10 |
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+ orc. r9, r12, r11 |
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+ bne cr0, L(different_nocmpb) |
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+ |
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+ addi r7, r3, 32 |
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+ addi r4, r4, 32 |
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+ |
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+L(align): |
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+ /* Now it has checked for first 32 bytes. */ |
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+ vspltisb v0, 0 |
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+ vspltisb v2, -1 |
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+ lvsr v6, 0, r4 /* Compute mask. */ |
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+ or r5, r4, r7 |
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+ andi. r5, r5, 0xF |
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+ beq cr0, L(aligned) |
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+ andi. r5, r7, 0xF |
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+ beq cr0, L(s1_align) |
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+ lvsr v10, 0, r7 /* Compute mask. */ |
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+ |
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+ /* Both s1 and s2 are unaligned. */ |
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+ GET16BYTES(v4, r7, v10) |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ beq cr6, L(match) |
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+ b L(different) |
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+ |
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+ /* Align s1 to qw and adjust s2 address. */ |
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+ .align 4 |
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+L(match): |
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+ clrldi r6, r7, 60 |
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+ subfic r5, r6, 16 |
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+ add r7, r7, r5 |
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+ add r4, r4, r5 |
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+ andi. r5, r4, 0xF |
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+ beq cr0, L(aligned) |
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+ lvsr v6, 0, r4 |
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+ /* There are 2 loops depending on the input alignment. |
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+ Each loop gets 16 bytes from s1 and s2 and compares. |
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+ Loop until a mismatch or null occurs. */ |
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+L(s1_align): |
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+ lvx v4, r7, r0 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ bne cr6, L(different) |
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+ |
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+ lvx v4, r7, r0 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ bne cr6, L(different) |
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+ |
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+ lvx v4, r7, r0 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ bne cr6, L(different) |
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+ |
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+ lvx v4, r7, r0 |
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+ GET16BYTES(v5, r4, v6) |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ beq cr6, L(s1_align) |
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+ b L(different) |
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+ |
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+ .align 4 |
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+L(aligned): |
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+ lvx v4, 0, r7 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ bne cr6, L(different) |
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+ |
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+ lvx v4, 0, r7 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ bne cr6, L(different) |
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+ |
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+ lvx v4, 0, r7 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ bne cr6, L(different) |
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+ |
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+ lvx v4, 0, r7 |
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+ lvx v5, 0, r4 |
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+ VCMPNEZB(v7, v5, v4) |
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+ addi r7, r7, 16 |
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+ addi r4, r4, 16 |
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+ beq cr6, L(aligned) |
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+ |
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+ /* Calculate and return the difference. */ |
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+L(different): |
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+ VCTZLSBB(r6, v7) |
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+ VEXTUBRX(r5, r6, v4) |
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+ VEXTUBRX(r4, r6, v5) |
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+ subf r3, r4, r5 |
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+ extsw r3, r3 |
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+ blr |
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+ |
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+ .align 4 |
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+L(different_nocmpb): |
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+ neg r3, r9 |
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+ and r9, r9, r3 |
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+ cntlzd r9, r9 |
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+ subfic r9, r9, 63 |
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+ srd r3, r8, r9 |
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+ srd r10, r10, r9 |
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+ rldicl r10, r10, 0, 56 |
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+ rldicl r3, r3, 0, 56 |
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+ subf r3, r10, r3 |
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+ extsw r3, r3 |
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+ blr |
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+ |
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+ .align 4 |
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+L(pagecross_check): |
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+ subfic r9, r9, 4096 |
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+ subfic r7, r7, 4096 |
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+ cmpld cr7, r7, r9 |
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+ bge cr7, L(pagecross) |
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+ mr r7, r9 |
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+ |
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+ /* If unaligned 16 bytes reads across a 4K page boundary, it uses |
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+ a simple byte a byte comparison until the page alignment for s1 |
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+ is reached. */ |
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+L(pagecross): |
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+ add r7, r3, r7 |
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+ subf r9, r3, r7 |
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+ mtctr r9 |
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+ |
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+ .align 4 |
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+L(pagecross_loop): |
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+ /* Loads a byte from s1 and s2, compare if *s1 is equal to *s2 |
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+ and if *s1 is '\0'. */ |
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+ lbz r9, 0(r3) |
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+ lbz r10, 0(r4) |
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+ addi r3, r3, 1 |
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+ addi r4, r4, 1 |
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+ cmplw cr7, r9, r10 |
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+ cmpdi cr5, r9, r0 |
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+ bne cr7, L(pagecross_ne) |
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+ beq cr5, L(pagecross_nullfound) |
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+ bdnz L(pagecross_loop) |
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+ b L(align) |
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+ |
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+ .align 4 |
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+L(pagecross_ne): |
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+ extsw r3, r9 |
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+ mr r9, r10 |
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+L(pagecross_retdiff): |
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+ subf r9, r9, r3 |
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+ extsw r3, r9 |
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+ blr |
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+ |
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+ .align 4 |
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+L(pagecross_nullfound): |
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+ li r3, 0 |
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+ b L(pagecross_retdiff) |
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+END (strcmp) |
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+libc_hidden_builtin_def (strcmp) |
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+#else |
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+#include <sysdeps/powerpc/powerpc64/power8/strcmp.S> |
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+#endif |
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-- |
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2.1.0
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