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2016-08-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
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Backport from mainline (minus test for POWER9 support) |
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2016-08-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com> |
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PR target/72863 |
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* vsx.md (vsx_load_<mode>): For P8LE, emit swaps at expand time. |
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(vsx_store_<mode>): Likewise. |
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* gcc.target/powerpc/pr72863.c: New test. |
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--- gcc/config/rs6000/vsx.md (revision 239761) |
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+++ gcc/config/rs6000/vsx.md (revision 239762) |
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@@ -716,13 +716,27 @@ (define_expand "vsx_load_<mode>" |
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[(set (match_operand:VSX_M 0 "vsx_register_operand" "") |
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(match_operand:VSX_M 1 "memory_operand" ""))] |
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"VECTOR_MEM_VSX_P (<MODE>mode)" |
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- "") |
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+{ |
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+ /* Expand to swaps if needed, prior to swap optimization. */ |
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+ if (!BYTES_BIG_ENDIAN) |
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+ { |
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+ rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode); |
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+ DONE; |
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+ } |
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+}) |
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(define_expand "vsx_store_<mode>" |
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[(set (match_operand:VSX_M 0 "memory_operand" "") |
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(match_operand:VSX_M 1 "vsx_register_operand" ""))] |
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"VECTOR_MEM_VSX_P (<MODE>mode)" |
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- "") |
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+{ |
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+ /* Expand to swaps if needed, prior to swap optimization. */ |
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+ if (!BYTES_BIG_ENDIAN) |
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+ { |
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+ rs6000_emit_le_vsx_move (operands[0], operands[1], <MODE>mode); |
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+ DONE; |
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+ } |
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+}) |
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;; VSX vector floating point arithmetic instructions. The VSX scalar |
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--- gcc/testsuite/gcc.target/powerpc/pr72863.c (nonexistent) |
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+++ gcc/testsuite/gcc.target/powerpc/pr72863.c (revision 239762) |
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@@ -0,0 +1,27 @@ |
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+/* { dg-do compile { target { powerpc64le-*-* } } } */ |
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+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ |
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+/* { dg-options "-mcpu=power8 -O3" } */ |
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+/* { dg-final { scan-assembler "lxvd2x" } } */ |
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+/* { dg-final { scan-assembler "stxvd2x" } } */ |
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+/* { dg-final { scan-assembler-not "xxpermdi" } } */ |
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+ |
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+#include <altivec.h> |
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+ |
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+extern unsigned char *src, *dst; |
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+ |
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+void b(void) |
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+{ |
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+ int i; |
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+ |
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+ unsigned char *s8 = src; |
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+ unsigned char *d8 = dst; |
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+ |
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+ for (i = 0; i < 100; i++) { |
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+ vector unsigned char vs = vec_vsx_ld(0, s8); |
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+ vector unsigned char vd = vec_vsx_ld(0, d8); |
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+ vector unsigned char vr = vec_xor(vs, vd); |
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+ vec_vsx_st(vr, 0, d8); |
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+ s8 += 16; |
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+ d8 += 16; |
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+ } |
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+}
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