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gcc package update 

Signed-off-by: basebuilder_pel7x64builder0 <basebuilder@powerel.org>
master
basebuilder_pel7x64builder0 2020-12-14 17:20:59 +01:00
parent 528230e2ef
commit d015312d5b
15 changed files with 783 additions and 1 deletions
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226
SOURCES/gcc48-aarch64-pauth.patch Normal file
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@ -0,0 +1,226 @@
2017-01-19 Jiong Wang <jiong.wang@arm.com>

* config/aarch64/aarch64-unwind.h: New file.
(DWARF_REGNUM_AARCH64_RA_STATE): Define.
(MD_POST_EXTRACT_ROOT_ADDR): New target marcro and define it on AArch64.
(MD_POST_EXTRACT_FRAME_ADDR): Likewise.
(MD_POST_FROB_EH_HANDLER_ADDR): Likewise.
(MD_FROB_UPDATE_CONTEXT): Define it on AArch64.
(aarch64_post_extract_frame_addr): New function.
(aarch64_post_frob_eh_handler_addr): New function.
(aarch64_frob_update_context): New function.
* config/aarch64/linux-unwind.h: Include aarch64-unwind.h
* config.host (aarch64*-*-elf, aarch64*-*-rtems*,
aarch64*-*-freebsd*):
Initialize md_unwind_header to include aarch64-unwind.h.
* unwind-dw2.c (struct _Unwind_Context): Define "RA_A_SIGNED_BIT".
(execute_cfa_program): Multiplex DW_CFA_GNU_window_save for
__aarch64__.
(uw_update_context): Honor MD_POST_EXTRACT_FRAME_ADDR.
(uw_init_context_1): Honor MD_POST_EXTRACT_ROOT_ADDR.
(uw_frob_return_addr): New function.
(uw_install_context): Use uw_frob_return_addr.

--- libgcc/config.host (revision 244672)
+++ libgcc/config.host (revision 244674)
@@ -284,6 +284,7 @@
extra_parts="$extra_parts crtbegin.o crtend.o crti.o crtn.o"
tmake_file="${tmake_file} ${cpu_type}/t-aarch64"
tmake_file="${tmake_file} ${cpu_type}/t-softfp t-softfp"
+ md_unwind_header=aarch64/aarch64-unwind.h
;;
aarch64*-*-linux*)
md_unwind_header=aarch64/linux-unwind.h
--- libgcc/config/aarch64/aarch64-unwind.h (nonexistent)
+++ libgcc/config/aarch64/aarch64-unwind.h (revision 244674)
@@ -0,0 +1,89 @@
+/* Copyright (C) 2017 Free Software Foundation, Inc.
+ Contributed by ARM Ltd.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+<http://www.gnu.org/licenses/>. */
+
+#ifndef AARCH64_UNWIND_H
+#define AARCH64_UNWIND_H
+
+#define DWARF_REGNUM_AARCH64_RA_STATE 34
+
+#define MD_POST_EXTRACT_ROOT_ADDR(addr) \
+ ({ void *__addr; asm ("mov x30, %0; hint 7; mov %0, x30" \
+ : "=r" (__addr) : "0" (addr) : "x30", "cc"); __addr; })
+#define MD_POST_EXTRACT_FRAME_ADDR(context, fs, addr) \
+ aarch64_post_extract_frame_addr (context, fs, addr)
+#define MD_POST_FROB_EH_HANDLER_ADDR(current, target, addr) \
+ aarch64_post_frob_eh_handler_addr (current, target, addr)
+#define MD_FROB_UPDATE_CONTEXT(context, fs) \
+ aarch64_frob_update_context (context, fs)
+
+/* Do AArch64 private extraction on ADDR based on context info CONTEXT and
+ unwind frame info FS. If ADDR is signed, we do address authentication on it
+ using CFA of current frame. */
+
+static inline void *
+aarch64_post_extract_frame_addr (struct _Unwind_Context *context,
+ _Unwind_FrameState *fs, void *addr)
+{
+ if (fs->regs.reg[DWARF_REGNUM_AARCH64_RA_STATE].loc.offset & 0x1)
+ {
+ _Unwind_Word salt = (_Unwind_Word) context->cfa;
+ asm ("mov x17, %0; mov x16, %1; hint 12; mov %0, x17"
+ : "+r" (addr) : "r" (salt) : "x16", "x17", "cc");
+ }
+ return addr;
+}
+
+/* Do AArch64 private frob on exception handler's address HANDLER_ADDR before
+ installing it into current context CURRENT. TARGET is currently not used.
+ We need to sign exception handler's address if CURRENT itself is signed. */
+
+static inline void *
+aarch64_post_frob_eh_handler_addr (struct _Unwind_Context *current,
+ struct _Unwind_Context *target
+ ATTRIBUTE_UNUSED,
+ void *handler_addr)
+{
+ if (current->flags & RA_A_SIGNED_BIT)
+ asm ("mov x17, %0; mov x16, %1; hint 8; mov %0, x17"
+ : "+r" (handler_addr) : "r" ((_Unwind_Word) current->cfa)
+ : "x16", "x17", "cc");
+ return handler_addr;
+}
+
+/* Do AArch64 private initialization on CONTEXT based on frame info FS. Mark
+ CONTEXT as return address signed if bit 0 of DWARF_REGNUM_AARCH64_RA_STATE is
+ set. */
+
+static inline void
+aarch64_frob_update_context (struct _Unwind_Context *context,
+ _Unwind_FrameState *fs)
+{
+ if (fs->regs.reg[DWARF_REGNUM_AARCH64_RA_STATE].loc.offset & 0x1)
+ /* The flag is used for re-authenticating EH handler's address. */
+ context->flags |= RA_A_SIGNED_BIT;
+
+ return;
+}
+
+#endif /* defined AARCH64_UNWIND_H */
--- libgcc/config/aarch64/linux-unwind.h (revision 244672)
+++ libgcc/config/aarch64/linux-unwind.h (revision 244674)
@@ -24,6 +24,7 @@
#include <signal.h>
#include <sys/ucontext.h>
+#include "config/aarch64/aarch64-unwind.h"
#define MD_FALLBACK_FRAME_STATE_FOR aarch64_fallback_frame_state
--- libgcc/unwind-dw2.c (revision 244672)
+++ libgcc/unwind-dw2.c (revision 244674)
@@ -136,6 +136,8 @@ struct _Unwind_Context
#define SIGNAL_FRAME_BIT ((~(_Unwind_Word) 0 >> 1) + 1)
/* Context which has version/args_size/by_value fields. */
#define EXTENDED_CONTEXT_BIT ((~(_Unwind_Word) 0 >> 2) + 1)
+ /* Bit reserved on AArch64, return address has been signed with A key. */
+#define RA_A_SIGNED_BIT ((~(_Unwind_Word) 0 >> 3) + 1)
_Unwind_Word flags;
/* 0 for now, can be increased when further fields are added to
struct _Unwind_Context. */
@@ -1189,6 +1191,11 @@ execute_cfa_program (const unsigned char
break;
case DW_CFA_GNU_window_save:
+#ifdef __aarch64__
+ /* This CFA is multiplexed with Sparc. On AArch64 it's used to toggle
+ return address signing status. */
+ fs->regs.reg[DWARF_REGNUM_AARCH64_RA_STATE].loc.offset ^= 1;
+#else
/* ??? Hardcoded for SPARC register window configuration. */
if (DWARF_FRAME_REGISTERS >= 32)
for (reg = 16; reg < 32; ++reg)
@@ -1192,6 +1199,7 @@ execute_cfa_program (const unsigned char
fs->regs.reg[reg].how = REG_SAVED_OFFSET;
fs->regs.reg[reg].loc.offset = (reg - 16) * sizeof (void *);
}
+#endif
break;
case DW_CFA_GNU_args_size:
@@ -1513,10 +1521,15 @@ uw_update_context (struct _Unwind_Contex
stack frame. */
context->ra = 0;
else
- /* Compute the return address now, since the return address column
- can change from frame to frame. */
- context->ra = __builtin_extract_return_addr
- (_Unwind_GetPtr (context, fs->retaddr_column));
+ {
+ /* Compute the return address now, since the return address column
+ can change from frame to frame. */
+ context->ra = __builtin_extract_return_addr
+ (_Unwind_GetPtr (context, fs->retaddr_column));
+#ifdef MD_POST_EXTRACT_FRAME_ADDR
+ context->ra = MD_POST_EXTRACT_FRAME_ADDR (context, fs, context->ra);
+#endif
+ }
}
static void
@@ -1550,6 +1563,9 @@ uw_init_context_1 (struct _Unwind_Contex
void *outer_cfa, void *outer_ra)
{
void *ra = __builtin_extract_return_addr (__builtin_return_address (0));
+#ifdef MD_POST_EXTRACT_ROOT_ADDR
+ ra = MD_POST_EXTRACT_ROOT_ADDR (ra);
+#endif
_Unwind_FrameState fs;
_Unwind_SpTmp sp_slot;
_Unwind_Reason_Code code;
@@ -1586,6 +1602,9 @@ uw_init_context_1 (struct _Unwind_Contex
initialization context, then we can't see it in the given
call frame data. So have the initialization context tell us. */
context->ra = __builtin_extract_return_addr (outer_ra);
+#ifdef MD_POST_EXTRACT_ROOT_ADDR
+ context->ra = MD_POST_EXTRACT_ROOT_ADDR (context->ra);
+#endif
}
static void _Unwind_DebugHook (void *, void *)
@@ -1608,6 +1627,10 @@ _Unwind_DebugHook (void *cfa __attribute
#endif
}

+#ifndef MD_POST_FROB_EH_HANDLER_ADDR
+#define MD_POST_FROB_EH_HANDLER_ADDR(c, t, r) r
+#endif
+
/* Install TARGET into CURRENT so that we can return to it. This is a
macro because __builtin_eh_return must be invoked in the context of
our caller. */
@@ -1621,6 +1644,8 @@ _Unwind_DebugHook (void *cfa __attribute
{ \
long offset = uw_install_context_1 ((CURRENT), (TARGET)); \
void *handler = __builtin_frob_return_addr ((TARGET)->ra); \
+ handler = (MD_POST_FROB_EH_HANDLER_ADDR ((CURRENT), (TARGET), \
+ handler)); \
_Unwind_DebugHook ((TARGET)->cfa, handler); \
__builtin_eh_return (offset, handler); \
} \

26
SOURCES/gcc48-pr53658.patch Normal file
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@ -0,0 +1,26 @@
2013-06-07 Paolo Carlini <paolo.carlini@oracle.com>

PR c++/53658
* pt.c (lookup_template_class_1): Consistently use TYPE_MAIN_DECL,
not TYPE_STUB_DECL, to access the _DECL for a _TYPE.

--- gcc/cp/pt.c
+++ gcc/cp/pt.c
@@ -7561,7 +7561,7 @@ lookup_template_class_1 (tree d1, tree arglist, tree in_decl, tree context,
if (CLASS_TYPE_P (template_type) && is_dependent_type)
/* If the type makes use of template parameters, the
code that generates debugging information will crash. */
- DECL_IGNORED_P (TYPE_STUB_DECL (t)) = 1;
+ DECL_IGNORED_P (TYPE_MAIN_DECL (t)) = 1;
/* Possibly limit visibility based on template args. */
TREE_PUBLIC (type_decl) = 1;
--- /dev/null
+++ gcc/testsuite/g++.dg/cpp0x/alias-decl-36.C
@@ -0,0 +1,6 @@
+// PR c++/53658
+// { dg-do compile { target c++11 } }
+
+struct A;
+template <typename> using Foo = const A;
+template <typename Item> Foo <Item> bar();

46
SOURCES/gcc48-pr60784.patch Normal file
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@ -0,0 +1,46 @@
2014-05-02 Marek Polacek <polacek@redhat.com>

PR c/60784
* c-typeck.c (push_init_level): Set constructor_designated to
p->designated for structures.

--- gcc/c/c-typeck.c
+++ gcc/c/c-typeck.c
@@ -7270,6 +7270,9 @@ push_init_level (int implicit, struct obstack * braced_init_obstack)
push_member_name (constructor_fields);
constructor_depth++;
}
+ /* If upper initializer is designated, then mark this as
+ designated too to prevent bogus warnings. */
+ constructor_designated = p->designated;
}
else if (TREE_CODE (constructor_type) == ARRAY_TYPE)
{
--- /dev/null
+++ gcc/testsuite/gcc.dg/pr60784.c
@@ -0,0 +1,25 @@
+/* PR c/60784 */
+/* { dg-do compile } */
+/* { dg-options "-Wextra -std=c99" } */
+
+struct A { int i, j; };
+struct B { struct A a; } b1 = { .a.i = 1, .a.j = 1 };
+struct B b2 = { .a.i = 1 };
+
+struct C { struct { int a, b; }; } c1 = { .a = 4, .b = 2 };
+struct C c2 = { .a = 4, .b = 2 };
+
+struct D { struct A a; };
+struct E { struct D d; };
+struct F { struct E e; } f1 = { .e.d.a.i = 8 };
+struct F f2 = { .e.d.a.i = 8, .e.d.a.j = 3 };
+
+struct G {
+ struct {
+ struct {
+ struct {
+ int a, b, c, d, e, f;
+ };
+ };
+ };
+} g = { .b = 2 };

16
SOURCES/gcc48-pr63442.patch Normal file
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@ -0,0 +1,16 @@
2014-10-27 Jiong Wang <jiong.wang@arm.com>

PR target/63442
* optabs.c (prepare_cmp_insn): Use "ret_mode" instead of "word_mode".

--- gcc/optabs.c
+++ gcc/optabs.c
@@ -4294,7 +4294,7 @@ prepare_cmp_insn (rtx x, rtx y, enum rtx_code comparison, rtx size,
y = const0_rtx;
}
- *pmode = word_mode;
+ *pmode = ret_mode;
prepare_cmp_insn (x, y, comparison, NULL_RTX, unsignedp, methods,
ptest, pmode);
}

52
SOURCES/gcc48-pr63567-1.patch Normal file
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@ -0,0 +1,52 @@
2014-10-17 Marek Polacek <polacek@redhat.com>

PR c/63567
* c-typeck.c (digest_init): Allow initializing objects with static
storage duration with compound literals even in C99 and add pedwarn
for it.

--- gcc/c/c-typeck.c
+++ gcc/c/c-typeck.c
@@ -6683,13 +6683,15 @@ digest_init (location_t init_loc, tree type, tree init, tree origtype,
inside_init = convert (type, inside_init);
if (require_constant
- && (code == VECTOR_TYPE || !flag_isoc99)
&& TREE_CODE (inside_init) == COMPOUND_LITERAL_EXPR)
{
/* As an extension, allow initializing objects with static storage
duration with compound literals (which are then treated just as
the brace enclosed list they contain). Also allow this for
vectors, as we can only assign them with compound literals. */
+ if (flag_isoc99 && code != VECTOR_TYPE)
+ pedwarn_init (init_loc, OPT_Wpedantic, "initializer element "
+ "is not constant");
tree decl = COMPOUND_LITERAL_EXPR_DECL (inside_init);
inside_init = DECL_INITIAL (decl);
}
--- /dev/null
+++ gcc/testsuite/gcc.dg/pr63567-1.c
@@ -0,0 +1,10 @@
+/* PR c/63567 */
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+/* Allow initializing objects with static storage duration with
+ compound literals even. This is being used in Linux kernel. */
+
+struct T { int i; };
+struct S { struct T t; };
+static struct S s = (struct S) { .t = { 42 } };
--- /dev/null
+++ gcc/testsuite/gcc.dg/pr63567-2.c
@@ -0,0 +1,10 @@
+/* PR c/63567 */
+/* { dg-do compile } */
+/* { dg-options "-pedantic -std=gnu99" } */
+
+/* Allow initializing objects with static storage duration with
+ compound literals. This is being used in Linux kernel. */
+
+struct T { int i; };
+struct S { struct T t; };
+static struct S s = (struct S) { .t = { 42 } }; /* { dg-warning "initializer element is not constant" } */

45
SOURCES/gcc48-pr63567-2.patch Normal file
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@ -0,0 +1,45 @@
2014-10-19 Marek Polacek <polacek@redhat.com>

PR c/63567
* c-typeck.c (output_init_element): Allow initializing objects with
static storage duration with compound literals even in C99 and add
pedwarn for it.

--- gcc/c/c-typeck.c
+++ gcc/c/c-typeck.c
@@ -8251,11 +8251,14 @@ output_init_element (location_t loc, tree value, tree origtype,
value = array_to_pointer_conversion (input_location, value);
if (TREE_CODE (value) == COMPOUND_LITERAL_EXPR
- && require_constant_value && !flag_isoc99 && pending)
+ && require_constant_value && pending)
{
/* As an extension, allow initializing objects with static storage
duration with compound literals (which are then treated just as
the brace enclosed list they contain). */
+ if (flag_isoc99)
+ pedwarn_init (input_location, OPT_Wpedantic, "initializer element is not "
+ "constant");
tree decl = COMPOUND_LITERAL_EXPR_DECL (value);
value = DECL_INITIAL (decl);
}
--- /dev/null
+++ gcc/testsuite/gcc.dg/pr63567-3.c
@@ -0,0 +1,7 @@
+/* PR c/63567 */
+/* { dg-do compile } */
+/* { dg-options "" } */
+
+struct T { int i; };
+struct S { struct T t; };
+struct S s = { .t = { (int) { 1 } } };
--- /dev/null
+++ gcc/testsuite/gcc.dg/pr63567-4.c
@@ -0,0 +1,7 @@
+/* PR c/63567 */
+/* { dg-do compile } */
+/* { dg-options "-Wpedantic -std=gnu99" } */
+
+struct T { int i; };
+struct S { struct T t; };
+struct S s = { .t = { (int) { 1 } } }; /* { dg-warning "initializer element is not constant|initialization" } */

17
SOURCES/gcc48-pr68814.patch Normal file
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@ -0,0 +1,17 @@
2015-12-11 Segher Boessenkool <segher@kernel.crashing.org>

PR rtl-optimization/68814
* rtlanal.c (set_noop_p): Use BITS_BIG_ENDIAN instead of
BYTES_BIG_ENDIAN.

--- gcc/rtlanal.c
+++ gcc/rtlanal.c
@@ -1534,7 +1534,7 @@ set_noop_p (const_rtx set)
if (GET_CODE (dst) == ZERO_EXTRACT)
return rtx_equal_p (XEXP (dst, 0), src)
- && ! BYTES_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
+ && !BITS_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx
&& !side_effects_p (src);
if (GET_CODE (dst) == STRICT_LOW_PART)

51
SOURCES/gcc48-pr69891.patch Normal file
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@ -0,0 +1,51 @@
2016-02-26 Jakub Jelinek <jakub@redhat.com>
Eric Botcazou <ebotcazou@adacore.com>

PR rtl-optimization/69891
* dse.c (scan_insn): If we can't figure out memset arguments
or they are non-constant, call clear_rhs_from_active_local_stores.

--- gcc/testsuite/gcc.target/i386/pr69891.c (nonexistent)
+++ gcc/testsuite/gcc.target/i386/pr69891.c (revision 238137)
@@ -0,0 +1,30 @@
+/* PR rtl-optimization/69891 */
+/* { dg-do run } */
+/* { dg-options "-O -fno-tree-fre -mstringop-strategy=libcall -Wno-psabi" } */
+/* { dg-additional-options "-mno-sse" { target ia32 } } */
+
+typedef unsigned short A;
+typedef unsigned short B __attribute__ ((vector_size (32)));
+typedef unsigned int C;
+typedef unsigned int D __attribute__ ((vector_size (32)));
+typedef unsigned long long E;
+typedef unsigned long long F __attribute__ ((vector_size (32)));
+
+__attribute__((noinline, noclone)) unsigned
+foo(D a, B b, D c, F d)
+{
+ b /= (B) {1, -c[0]} | 1;
+ c[0] |= 7;
+ a %= c | 1;
+ c ^= c;
+ return a[0] + b[15] + c[0] + d[3];
+}
+
+int
+main ()
+{
+ unsigned x = foo ((D) {}, (B) {}, (D) {}, (F) {});
+ if (x != 0)
+ __builtin_abort ();
+ return 0;
+}
--- gcc/dse.c (revision 238136)
+++ gcc/dse.c (revision 238137)
@@ -2582,6 +2582,8 @@
active_local_stores = insn_info;
}
}
+ else
+ clear_rhs_from_active_local_stores ();
}
}

67
SOURCES/gcc48-pr92950.patch Normal file
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@ -0,0 +1,67 @@
2019-12-17 Andreas Krebbel <krebbel@linux.ibm.com>

Backport from mainline
2019-12-16 Andreas Krebbel <krebbel@linux.ibm.com>

PR target/92950
* config/s390/vector.md ("mov<mode>" for V_8): Replace lh, lhy,
and lhrl with llc.

--- gcc/config/s390/vector.md
+++ gcc/config/s390/vector.md
@@ -289,9 +289,9 @@
; However, this would probably be slower.
(define_insn "mov<mode>"
- [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d, v,QR, v, v, v, v,d, Q, S, Q, S, d, d,d,d,d,R,T")
- (match_operand:V_8 1 "general_operand" " v,d,v,QR, v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,R,T,b,d,d"))]
- ""
+ [(set (match_operand:V_8 0 "nonimmediate_operand" "=v,v,d,v,QR, v, v, v, v,d, Q, S, Q, S, d, d,d,R,T")
+ (match_operand:V_8 1 "general_operand" " v,d,v,QR,v,j00,jm1,jyy,jxx,d,j00,j00,jm1,jm1,j00,jm1,T,d,d"))]
+ "TARGET_VX"
"@
vlr\t%v0,%v1
vlvgb\t%v0,%1,0
@@ -309,12 +309,10 @@
mviy\t%0,-1
lhi\t%0,0
lhi\t%0,-1
- lh\t%0,%1
- lhy\t%0,%1
- lhrl\t%0,%1
+ llc\t%0,%1
stc\t%1,%0
stcy\t%1,%0"
- [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RX,RXY,RIL,RX,RXY")])
+ [(set_attr "op_type" "VRR,VRS,VRS,VRX,VRX,VRI,VRI,VRI,VRI,RR,SI,SIY,SI,SIY,RI,RI,RXY,RX,RXY")])
(define_insn "mov<mode>"
[(set (match_operand:V_16 0 "nonimmediate_operand" "=v,v,d, v,QR, v, v, v, v,d, Q, Q, d, d,d,d,d,R,T,b")
--- /dev/null
+++ gcc/testsuite/gcc.target/s390/vector/pr92950.c
@@ -0,0 +1,25 @@
+/* { dg-do run } */
+/* { dg-options "-O3 -mzarch -march=z13" } */
+
+struct a {
+ int b;
+ char c;
+};
+struct a d = {1, 16};
+struct a *e = &d;
+
+int f = 0;
+
+int main() {
+ struct a g = {0, 0 };
+ f = 0;
+
+ for (; f <= 1; f++) {
+ g = d;
+ *e = g;
+ }
+
+ if (d.c != 16)
+ __builtin_abort();
+ return 0;
+}

70
SOURCES/gcc48-pr93272.patch Normal file
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@ -0,0 +1,70 @@
2020-01-28 Vladimir Makarov <vmakarov@redhat.com>

PR rtl-optimization/93272
* ira-lives.c (process_out_of_region_eh_regs): New function.
(process_bb_node_lives): Call it.

--- gcc/ira-lives.c
+++ gcc/ira-lives.c
@@ -1116,6 +1116,50 @@
return cheap_reg;
}
+#ifdef EH_RETURN_DATA_REGNO
+
+/* Add EH return hard registers as conflict hard registers to allocnos
+ living at end of BB. For most allocnos it is already done in
+ process_bb_node_lives when we processing input edges but it does
+ not work when and EH edge is edge out of the current region. This
+ function covers such out of region edges. */
+static void
+process_out_of_region_eh_regs (basic_block bb)
+{
+ edge e;
+ edge_iterator ei;
+ unsigned int i;
+ bitmap_iterator bi;
+ bool eh_p = false;
+
+ FOR_EACH_EDGE (e, ei, bb->succs)
+ if ((e->flags & EDGE_EH)
+ && IRA_BB_NODE (e->dest)->parent != IRA_BB_NODE (bb)->parent)
+ eh_p = true;
+
+ if (! eh_p)
+ return;
+
+ EXECUTE_IF_SET_IN_BITMAP (df_get_live_out (bb), FIRST_PSEUDO_REGISTER, i, bi)
+ {
+ ira_allocno_t a = ira_curr_regno_allocno_map[i];
+ for (int n = ALLOCNO_NUM_OBJECTS (a) - 1; n >= 0; n--)
+ {
+ ira_object_t obj = ALLOCNO_OBJECT (a, n);
+ for (int k = 0; ; k++)
+ {
+ unsigned int regno = EH_RETURN_DATA_REGNO (k);
+ if (regno == INVALID_REGNUM)
+ break;
+ SET_HARD_REG_BIT (OBJECT_CONFLICT_HARD_REGS (obj), regno);
+ SET_HARD_REG_BIT (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), regno);
+ }
+ }
+ }
+}
+
+#endif
+
/* Process insns of the basic block given by its LOOP_TREE_NODE to
update allocno live ranges, allocno hard register conflicts,
intersected calls, and register pressure info for allocnos for the
@@ -1170,6 +1214,10 @@
EXECUTE_IF_SET_IN_BITMAP (reg_live_out, FIRST_PSEUDO_REGISTER, j, bi)
mark_pseudo_regno_live (j);
+#ifdef EH_RETURN_DATA_REGNO
+ process_out_of_region_eh_regs (bb);
+#endif
+
freq = REG_FREQ_FROM_BB (bb);
if (freq == 0)
freq = 1;

18
SOURCES/gcc48-rh1614326.patch Normal file
View File

@ -0,0 +1,18 @@
2016-05-04 Alan Modra <amodra@gmail.com>
* config/rs6000/rs6000.h (PIC_OFFSET_TABLE_REGNUM): Correct.

--- gcc/config/rs6000/rs6000.h
+++ gcc/config/rs6000/rs6000.h
@@ -2058,7 +2058,10 @@ do { \
to allocate such a register (if necessary). */
#define RS6000_PIC_OFFSET_TABLE_REGNUM 30
-#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? RS6000_PIC_OFFSET_TABLE_REGNUM : INVALID_REGNUM)
+#define PIC_OFFSET_TABLE_REGNUM \
+ (TARGET_TOC ? TOC_REGISTER \
+ : flag_pic ? RS6000_PIC_OFFSET_TABLE_REGNUM \
+ : INVALID_REGNUM)
#define TOC_REGISTER (TARGET_MINIMAL_TOC ? RS6000_PIC_OFFSET_TABLE_REGNUM : 2)

20
SOURCES/gcc48-rh1655148.patch Normal file
View File

@ -0,0 +1,20 @@
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index 6dfbb4642..9f30b2749 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -316,6 +316,15 @@ stack_var_conflict_p (size_t x, size_t y)
struct stack_var *b = &stack_vars[y];
if (x == y)
return false;
+ /* GCC 4.8 does not calculate the control flow for setjmp correctly
+ (BZ 56982). This might lead to merging stack variable slots
+ which in fact are live at the same time. The following check
+ considers all variables being live across setjmp invocations
+ (these must be marked volatile) to conflict with all other stack
+ variables. */
+ if (cfun->calls_setjmp
+ && (TREE_THIS_VOLATILE (a->decl) || TREE_THIS_VOLATILE (b->decl)))
+ return true;
/* Partitions containing an SSA name result from gimple registers
with things like unsupported modes. They are top-level and
hence conflict with everything else. */

29
SOURCES/gcc48-rh1659698.patch Normal file
View File

@ -0,0 +1,29 @@
2018-12-13 Peter Bergner <bergner@linux.ibm.com>

* config/powerpc/target.h (htm_available): Add support for
PPC_FEATURE2_HTM_NO_SUSPEND. Use __builtin_cpu_supports if available.

--- libitm/config/powerpc/target.h
+++ libitm/config/powerpc/target.h
@@ -81,7 +81,20 @@ cpu_relax (void)
static inline bool
htm_available (void)
{
- return (getauxval (AT_HWCAP2) & PPC_FEATURE2_HAS_HTM) ? true : false;
+#ifdef __BUILTIN_CPU_SUPPORTS__
+ if (__builtin_cpu_supports ("htm-no-suspend")
+ || __builtin_cpu_supports ("htm"))
+ return true;
+#else
+ unsigned long htm_flags = PPC_FEATURE2_HAS_HTM
+#ifdef PPC_FEATURE2_HTM_NO_SUSPEND
+ | PPC_FEATURE2_HTM_NO_SUSPEND
+#endif
+ | 0;
+ if (getauxval (AT_HWCAP2) & htm_flags)
+ return true;
+#endif
+ return false;
}
static inline uint32_t

36
SOURCES/gcc48-rh1740539.patch Normal file
View File

@ -0,0 +1,36 @@
--- gcc/fold-const.c
+++ gcc/fold-const.c
@@ -12461,6 +12461,7 @@ fold_binary_loc (location_t loc,
/* Turn (a OP c1) OP c2 into a OP (c1+c2). */
if (TREE_CODE (op0) == code && host_integerp (arg1, false)
+ && TREE_CODE (type) != VECTOR_TYPE
&& TREE_INT_CST_LOW (arg1) < TYPE_PRECISION (type)
&& host_integerp (TREE_OPERAND (arg0, 1), false)
&& TREE_INT_CST_LOW (TREE_OPERAND (arg0, 1)) < TYPE_PRECISION (type))
@@ -12491,6 +12492,7 @@ fold_binary_loc (location_t loc,
|| (TYPE_UNSIGNED (type)
&& code == RSHIFT_EXPR && TREE_CODE (arg0) == LSHIFT_EXPR))
&& host_integerp (arg1, false)
+ && TREE_CODE (type) != VECTOR_TYPE
&& TREE_INT_CST_LOW (arg1) < TYPE_PRECISION (type)
&& host_integerp (TREE_OPERAND (arg0, 1), false)
&& TREE_INT_CST_LOW (TREE_OPERAND (arg0, 1)) < TYPE_PRECISION (type))
@@ -12513,7 +12515,8 @@ fold_binary_loc (location_t loc,
/* Rewrite an LROTATE_EXPR by a constant into an
RROTATE_EXPR by a new constant. */
- if (code == LROTATE_EXPR && TREE_CODE (arg1) == INTEGER_CST)
+ if (code == LROTATE_EXPR && TREE_CODE (arg1) == INTEGER_CST
+ && TREE_CODE (type) != VECTOR_TYPE)
{
tree tem = build_int_cst (TREE_TYPE (arg1),
TYPE_PRECISION (type));
@@ -12538,6 +12541,7 @@ fold_binary_loc (location_t loc,
/* Two consecutive rotates adding up to the precision of the
type can be ignored. */
if (code == RROTATE_EXPR && TREE_CODE (arg1) == INTEGER_CST
+ && TREE_CODE (type) != VECTOR_TYPE
&& TREE_CODE (arg0) == RROTATE_EXPR
&& TREE_CODE (TREE_OPERAND (arg0, 1)) == INTEGER_CST
&& TREE_INT_CST_HIGH (arg1) == 0

65
SPECS/gcc.spec
View File

@ -5,7 +5,7 @@
%global SVNREV 225304 %global SVNREV 225304
# Note, gcc_release must be integer, if you want to add suffixes to # Note, gcc_release must be integer, if you want to add suffixes to
# %{release}, append them after %{gcc_release} on Release: line. # %{release}, append them after %{gcc_release} on Release: line.
%global gcc_release 36 %global gcc_release 44
%global _unpackaged_files_terminate_build 0 %global _unpackaged_files_terminate_build 0
%global _performance_build 1 %global _performance_build 1
%global multilib_64_archs sparc64 %global multilib_64_archs sparc64
@ -267,6 +267,20 @@ Patch68: gcc48-pr81395.patch
Patch69: gcc48-pr72717.patch Patch69: gcc48-pr72717.patch
Patch70: gcc48-pr66840.patch Patch70: gcc48-pr66840.patch
Patch71: gcc48-rh1546372.patch Patch71: gcc48-rh1546372.patch
Patch72: gcc48-rh1655148.patch
Patch73: gcc48-pr63442.patch
Patch74: gcc48-rh1659698.patch
Patch75: gcc48-pr69891.patch
Patch76: gcc48-pr68814.patch
Patch77: gcc48-pr63567-1.patch
Patch78: gcc48-pr63567-2.patch
Patch79: gcc48-rh1614326.patch
Patch80: gcc48-pr60784.patch
Patch81: gcc48-pr53658.patch
Patch82: gcc48-aarch64-pauth.patch
Patch83: gcc48-rh1740539.patch
Patch84: gcc48-pr92950.patch
Patch85: gcc48-pr93272.patch


Patch1000: fastjar-0.97-segfault.patch Patch1000: fastjar-0.97-segfault.patch
Patch1001: fastjar-0.97-len1.patch Patch1001: fastjar-0.97-len1.patch
@ -1067,6 +1081,20 @@ touch -r %{PATCH27} libstdc++-v3/python/libstdcxx/v6/printers.py
%patch69 -p0 -b .pr72717~ %patch69 -p0 -b .pr72717~
%patch70 -p0 -b .pr66840~ %patch70 -p0 -b .pr66840~
%patch71 -p0 -b .rh1546372~ %patch71 -p0 -b .rh1546372~
%patch72 -p1 -b .rh1655148~
%patch73 -p0 -b .pr63442~
%patch74 -p0 -b .rh1659698~
%patch75 -p0 -b .pr69891~
%patch76 -p0 -b .pr68814~
%patch77 -p0 -b .pr63567-1~
%patch78 -p0 -b .pr63567-2~
%patch79 -p0 -b .rh1614326~
%patch80 -p0 -b .pr60784~
%patch81 -p0 -b .pr53658~
%patch82 -p0 -b .aarch64-pauth~
%patch83 -p0 -b .rh1740539~
%patch84 -p0 -b .pr92950~
%patch85 -p0 -b .pr93272~


%if 0%{?_enable_debug_packages} %if 0%{?_enable_debug_packages}
cat > split-debuginfo.sh <<\EOF cat > split-debuginfo.sh <<\EOF
@ -3561,6 +3589,41 @@ fi
%{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/plugin %{_prefix}/libexec/gcc/%{gcc_target_platform}/%{gcc_version}/plugin


%changelog %changelog
* Wed Mar 25 2020 Marek Polacek <polacek@redhat.com> 4.8.5-44
- fix pr92950.c test (#1784759)

* Tue Mar 24 2020 Marek Polacek <polacek@redhat.com> 4.8.5-43
- fix wrong code emitted for movv1qi on s390x (#1784759)
- fix wrong code with EH due to a bug in LRA (#1800526)

* Mon Jan 13 2020 Marek Polacek <polacek@redhat.com> 4.8.5-42
- avoid folding shifts of vector types (#1740539)

* Fri Dec 6 2019 Marek Polacek <polacek@redhat.com> 4.8.5-41
- backport ARMv8.3 pointer authentication patches (#1769573)

* Tue Jul 23 2019 Marek Polacek <polacek@redhat.com> 4.8.5-40
- fix ICE with lambda in NSDMI (PR c++/66585, #1713056)
- revert the change

* Tue Feb 26 2019 Marek Polacek <polacek@redhat.com> 4.8.5-39
- fix pr63567-2.c and pr63567-4.c

* Mon Feb 25 2019 Marek Polacek <polacek@redhat.com> 4.8.5-38
- fix mode mismatch in prepare_cmp_insn (#1641329, PR target/63442)
- allow libitm to use HTM (#1659698)
- fix up memset handling in DSE (#1640805, PR rtl-optimization/69891)
- fix bits/bytes confusion in set_noop_p (#1594975, PR rtl-optimization/68814)
- enable initializing statics with COMPOUND_LITERAL_EXPR in C99
(#1672652, PR c/63567)
- fix PIC_OFFSET_TABLE_REGNUM (#1614326)
- quash spurious -Wmissing-field-initializers warnings (#1633716, PR c/60784)
- fix ICE with alias template (#1648161, PR c++/53658)

* Wed Jan 16 2019 Jeff Law <law@redhat.com> 4.8.5-37
- Avoid code generation bug due to incorrect CFG in the presence
of setjmp/longjmp (#1655148).

* Tue Jun 12 2018 Marek Polacek <polacek@redhat.com> 4.8.5-36 * Tue Jun 12 2018 Marek Polacek <polacek@redhat.com> 4.8.5-36
- back out the last change - back out the last change