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53 lines
1.4 KiB
53 lines
1.4 KiB
7 years ago
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From a9810094cf838e03102f95333db7ddfe810ccabd Mon Sep 17 00:00:00 2001
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From: Aristeu Rozanski <arozansk@redhat.com>
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Date: Mon, 18 May 2015 14:19:32 -0300
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Subject: [PATCH 05/13] rasdaemon: add support for Broadwell
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Only basic support for now.
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Based on mcelog code.
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Signed-off-by: Aristeu Rozanski <arozansk@redhat.com>
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Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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---
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ras-mce-handler.c | 3 +++
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ras-mce-handler.h | 1 +
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2 files changed, 4 insertions(+)
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diff --git a/ras-mce-handler.c b/ras-mce-handler.c
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index 07e298f..e059b92 100644
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--- a/ras-mce-handler.c
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+++ b/ras-mce-handler.c
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@@ -49,6 +49,7 @@ static char *cputype_name[] = {
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[CPU_IVY_BRIDGE_EPEX] = "Ivy Bridge EP/EX", /* Fill in better name */
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[CPU_HASWELL] = "Haswell",
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[CPU_HASWELL_EPEX] = "Intel Xeon v3 (Haswell) EP/EX",
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+ [CPU_BROADWELL] = "Broadwell",
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};
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static enum cputype select_intel_cputype(struct ras_events *ras)
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@@ -88,6 +89,8 @@ static enum cputype select_intel_cputype(struct ras_events *ras)
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return CPU_HASWELL;
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else if (mce->model == 0x3f)
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return CPU_HASWELL_EPEX;
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+ else if (mce->model == 0x3d)
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+ return CPU_BROADWELL;
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if (mce->model > 0x1a) {
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log(ALL, LOG_INFO,
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diff --git a/ras-mce-handler.h b/ras-mce-handler.h
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index b8b3d4f..ba01f55 100644
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--- a/ras-mce-handler.h
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+++ b/ras-mce-handler.h
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@@ -44,6 +44,7 @@ enum cputype {
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CPU_IVY_BRIDGE_EPEX,
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CPU_HASWELL,
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CPU_HASWELL_EPEX,
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+ CPU_BROADWELL,
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};
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struct mce_event {
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--
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1.8.3.1
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