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25 lines
812 B
25 lines
812 B
7 years ago
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commit a88dadbed5d7589ac7880efe62ea511844107795
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Author: Wilco <wdijkstr@arm.com>
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Date: Mon Jun 2 12:44:21 2014 +0100
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[AArch64] Remove ISB after FPCR write.
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diff --git a/ports/sysdeps/aarch64/fpu/fpu_control.h b/ports/sysdeps/aarch64/fpu/fpu_control.h
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index 6a265e8..d5a890d 100644
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--- a/ports/sysdeps/aarch64/fpu/fpu_control.h
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+++ b/ports/sysdeps/aarch64/fpu/fpu_control.h
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@@ -24,11 +24,8 @@
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#define _FPU_GETCW(fpcr) \
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__asm__ __volatile__ ("mrs %0, fpcr" : "=r" (fpcr))
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-#define _FPU_SETCW(fpcr) \
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- { \
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- __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr)); \
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- __asm__ __volatile__ ("isb"); \
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- }
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+#define _FPU_SETCW(fpcr) \
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+ __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr))
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#define _FPU_GETFPSR(fpsr) \
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__asm__ __volatile__ ("mrs %0, fpsr" : "=r" (fpsr))
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