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51 lines
1.7 KiB
51 lines
1.7 KiB
7 years ago
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From fa6260eb1304c6c829af177ab4aa1937db36fab1 Mon Sep 17 00:00:00 2001
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From: Ashok Raj <ashok.raj@intel.com>
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Date: Fri, 5 Jun 2015 13:32:47 -0300
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Subject: [PATCH 1/5] x86, rasdaemon: Add support to log Local Machine Check
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Exception (LMCE)
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Local Machine Check Exception allows certain errors to be signaled to
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only the affected logical processor. This change captures them for
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rasdaemon.
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log:Changes to rasdaemon to support new architectural changes to MCE
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Changet to rasdaemon to support new architectural extentions in Intel
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CPUs.
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Signed-off-by: Ashok Raj <ashok.raj@intel.com>
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Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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---
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mce-intel.c | 2 ++
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ras-mce-handler.h | 1 +
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2 files changed, 3 insertions(+)
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diff --git a/mce-intel.c b/mce-intel.c
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index 3684602..3503c6a 100644
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--- a/mce-intel.c
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+++ b/mce-intel.c
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@@ -185,6 +185,8 @@ static void decode_mcg(struct mce_event *e)
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mce_snprintf(e->mcgstatus_msg, "EIPV");
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if (mcgstatus & MCG_STATUS_MCIP)
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mce_snprintf(e->mcgstatus_msg, "MCIP");
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+ if (mcgstatus & MCG_STATUS_LMCE)
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+ mce_snprintf(e->mcgstatus_msg, "LMCE");
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}
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static void bank_name(struct mce_event *e)
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diff --git a/ras-mce-handler.h b/ras-mce-handler.h
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index 28aad00..13b8f52 100644
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--- a/ras-mce-handler.h
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+++ b/ras-mce-handler.h
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@@ -139,6 +139,7 @@ void tulsa_decode_model(struct mce_event *e);
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#define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */
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#define MCG_STATUS_EIPV (1ULL<<1) /* eip points to correct instruction */
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#define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */
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+#define MCG_STATUS_LMCE (1ULL<<3) /* local machine check signaled */
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/* Those functions are defined on per-cpu vendor C files */
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int parse_intel_event(struct ras_events *ras, struct mce_event *e);
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--
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1.8.3.1
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