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commit b817670b52b7414d592cbfd96fd77cf725a33413
Author: Alan Modra <amodra@gmail.com>
Date: Sat Dec 12 17:26:33 2015 +1030
Enable 2 operand form of powerpc mfcr with -many
This is a workaround for a gcc bug.
PR 19359
* ppc-opc.c (insert_fxm): Remove "ignored" from error message.
(powerpc_opcodes): Remove single-operand mfcr.
### a/opcodes/ChangeLog
### b/opcodes/ChangeLog
## -1,3 +1,9 @@
+2015-12-12 Alan Modra <amodra@gmail.com>
+
+ PR 19359
+ * ppc-opc.c (insert_fxm): Remove "ignored" from error message.
+ (powerpc_opcodes): Remove single-operand mfcr.
+
2015-12-11 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-asm.c (aarch64_ins_hint): New.
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -1434,7 +1434,7 @@ insert_fxm (unsigned long insn,
/* A value of -1 means we used the one operand form of
mfcr which is valid. */
if (value != -1)
- *errmsg = _("ignoring invalid mfcr mask");
+ *errmsg = _("invalid mfcr mask");
value = 0;
}
@@ -4742,8 +4742,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"tlbilxva", XTO(31,18,3), XTO_MASK, E500MC|PPCA2, PPCNONE, {RA0, RB}},
{"tlbilx", X(31,18), X_MASK, E500MC|PPCA2, PPCNONE, {T, RA0, RB}},
-{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}},
-{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM|PPCVLE, POWER4, {RT}},
+{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM4}},
{"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM|PPCVLE, PPCNONE, {RT, FXM}},
{"lwarx", X(31,20), XEH_MASK, PPC|PPCVLE, PPCNONE, {RT, RA0, RB, EH}},