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93 lines
2.1 KiB
93 lines
2.1 KiB
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// Coex Configuration |
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# |
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[H:S]0017 |
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[H:S]0022 |
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[H:A]d1 d1 20 00 02 01 02 09 0c 00 24 0f 04 00 00 01 |
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00 01 00 00 01 01 01 01 01 00 00 00 01 00 00 00 |
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d2 d2 |
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// Radio table TAG |
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# |
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[H:S]012C |
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[H:S]0042 |
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[H:A]B1 B1 12 00 08 00 01 30 06 00 02 00 00 20 02 00 |
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04 00 0C 40 01 00 48 00 00 48 54 9A 02 00 00 08 |
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02 00 48 00 89 EE 70 E6 38 00 D8 70 EF 52 02 00 |
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00 40 00 00 08 00 31 00 00 00 04 00 10 00 00 00 |
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B2 B2 |
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// System config TAG with 0x1C |
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# |
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[H:S]0013 |
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[H:S]00B6 |
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[H:A]C1 C1 17 02 06 00 01 30 55 00 0E CC 33 06 01 08 |
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64 96 14 05 FF FF 05 80 00 00 FF CC 00 CC 01 00 |
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20 80 FF CC 02 CC 04 00 DF EC 43 F8 00 21 00 E0 |
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FF CC 03 CC 06 00 80 F0 0E 28 80 F4 12 20 80 F8 |
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14 18 80 FC 1A 10 80 00 1E 08 80 04 1C 00 FF CC |
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04 CC 01 00 1A 12 40 96 01 C0 28 00 00 00 C0 01 |
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40 06 00 01 00 00 C8 00 00 F0 00 00 FF CC 0C CC |
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08 00 01 03 00 7E 08 08 00 7E 01 01 00 7E 01 03 |
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00 7E 03 03 00 7E 61 63 00 7E 63 65 00 7E 6A 6C |
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00 7E FF CC 09 CC 00 C9 FF CC 0B CC 0A 17 07 B2 |
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5E 01 52 0A 60 09 05 06 14 4B 00 00 58 02 D0 07 |
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00 41 FF CC C2 C2 |
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//Extern 32k + 24Mhz CPU |
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//bit 7: sleep disable/enable, default to enable |
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//e.g. to disable sleep, clear bit 7: |
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//[H:A]08 00 00 00 |
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# |
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[H:S]0021 |
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[H:S]0004 |
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[H:A]88 00 BD 1F |
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//Bdaddr |
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//# |
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//[H:S]0001 |
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//[H:S]0006 |
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//[H:A]89 60 41 7f 03 00 |
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//Audio for Intel I2S format |
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# |
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[H:S]0002 |
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[H:S]0004 |
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[H:A]63 00 01 33 |
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//Audio |
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# |
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[H:S]0003 |
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[H:S]0004 |
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[H:A]dd e5 2e 00 |
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//Audio |
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# |
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[H:S]0015 |
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[H:S]0004 |
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[H:A]12 00 00 00 |
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//Audio |
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# |
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[H:S]0016 |
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[H:S]0004 |
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[H:A]00 00 a7 02 |
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# |
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//PLC |
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[H:S]001F |
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[H:S]0008 |
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[H:A]01 1A 06 14 50 B4 32 96 |
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//Sniff Recovery |
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# |
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[H:S]003D |
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[H:S]0018 |
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[H:A]A0 0F 00 00 00 08 00 00 0F 00 7D 04 E8 03 01 00 |
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01 00 01 05 00 02 1F 01 |
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//BRM Config |
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# |
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[H:S]0026 |
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[H:S]000C |
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[H:A]01 20 46 01 0F 02 28 14 01 28 68 01 |
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//TLPM |
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//[79:64] - TLPM wakeup timeout in ms, default 10 |
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//[127:96] - TLPM idle timeout in ms, default 1000 |
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//e.g. to change the wakeup timeout to 5 and idle timeout to 2000 |
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//[H:A]03 00 03 00 00 00 00 00 05 00 0A 00 D0 07 00 00 |
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// E8 03 00 00 E8 03 00 00 |
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# |
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[H:S]0023 |
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[H:S]0018 |
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[H:A]03 00 03 00 00 00 00 00 0A 00 0A 00 E8 03 00 00 |
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E8 03 00 00 E8 03 00 00
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