This patch adds firmware for Keystone QMSS Accumulator PDSP. This is required
to support Accumulator queues. Accumulator queues are one of the queue types
supported in drivers/soc/ti/knav_qmss_acc.c. This queue can be part of a
channel that supports one queue or multiple queue per channel and are managed
by the Accumulator PDSP. For more details on hardware, please refer
http://www.ti.com/lit/ug/sprugr9h/sprugr9h.pdf and DT documentation below in
linux kernel source tree
Documentation/devicetree/bindings/soc/ti/keystone-navigator-qmss.txt
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
The code points to the major version that is a link to the most
recent one, so we can remove the old firmware blobs.
For tests and validation purposes we will let few minor versions
available, but we need to let linux-firmware repo as
clean as possible, so let's remove old and unused ones.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Version: 1.22
Date : 9/23/2015
Notes:
Following additions from ver1.21
1. PLL lock wait time updated
2. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.21
DC3_DC5_COUNT 80030
DC5_DC6_COUNT 8002C
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
SD8897:
WLAN (SDIO) firmware version: 15.68.7.p18
Bluetooth (SDIO) firmware version: 15.68.7.p18
The combo image can be downloaded through either WLAN or
Bluetooth.
PCIe/USB-8897:
WLAN (PCIe) firmware version: 15.68.7.p18
Bluetooth (USB) firmware version: 15.68.7.p18
The combo image will be downloaded through WLAN only.
Signed-off-by: Amitkumar Karwar <akarwar@marvell.com>
Signed-off-by: Cathy Luo <cluo@marvell.com>
Signed-off-by: Frank Huang <frankh@marvell.com>
Following additions from previous version
1. Updated FW for NV12 enabling
2. Changes to the waits times for pll enable and disable.
3. Fixed GT interrupts issue
4. DC3_DC5_COUNT: 80038
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
VI asics are supported by the new amdgpu driver and
this adds the initial firmware to support them.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
This is the first release of the Intel OPA hfi1 firmware required by the hfi1
driver.
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Steve Vogel <steve.vogel@intel.com>
Following additions from ver1:
1. Performance Improvement.
2. Fix reset issue.
3. Scheduler fix.
4. Merge in new power management features.
5. Firmware layout changes.
6. Force Fence WA to guarantee correct ordering of GTT writes from uKernel.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
The code points to the major version that is a link to the most
recent one, so we can remove the old firmware blobs.
For tests and validation purposes we will let at least 3 latest
minor available, but we need to let linux-firmware repo as
clean as possible, so let's remove old and unused ones.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Following additions from ver1.20
1. Fixed GT interrupts issue when DC6 is enabled
2. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.20
DC3_DC5_COUNT 80030
DC5_DC6_COUNT 8002C
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Following additions from ver1.19
1. Changes to the waits times for pll enable and disable.
2. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.19
DC3_DC5_COUNT 80030
DC5_DC6_COUNT 8002C
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Following additions from ver1.04
1. No changes to the FW program itself
2. CSS header size field was fixed
3. Date field is fixed in header.
4. DC3_DC5_COUNT � 80038
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Following additions:
1. Updated FW for NV12 enabling
3. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.18 and ver1.17
DC3_DC5_COUNT 80030
DC5_DC6_COUNT 8002C
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This is new firmware for wilc1000 which is a single chip IEEE 802.11
b/g/n device.
Signed-off-by: Johnny Kim <johnny.kim@atmel.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
When sync ADC and the DAC was running at the same time the ADC
showed spikes in the signal. This happened when just before the
DRDY from the ADC was triggered a DAC interrupt was dealt with.
ADC and DAC share the same SPI bus and priority is now given the
ADC. The DAC values are now first stored in a buffer and
are only send to the DAC once the ADC has finished
converting all channels (start = 0) so that the SPI bus is
definitely quiet for about 100us.
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
for future driver versions I've added a digtial I/O read via
endpoint in1. This is not yet used but might be used in the
future for low latency IO reads if all ports are input ports
and thus the write could be omitted.
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
urb->interval is ignored in xhci drivers. Instead, the firmware
has an interval counter and transmits data at this interval.
The uframes in-between are zero length packets. In order to be
backward compatible with older kernels which support only USB 2.0
and 1.1 there are two ADC modes in the firmware. The old one which
assumes that the interval is established by the host (urb->interval)
and the new one where the interval value is transmitted to the
firmware.
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
There was still the old f2s address in the header. Updated to
my new address.
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
In order to prepare the firmware to work with the EHCI driver the
ADC data acquisition is now done by triggering the acquisition with
a start of frame interrupt (SOF) and then the collection of the data
is done via "data ready" interrupts until all data has been received.
Once this has happend then the whole packet is dispatched and at the
next SOF the next packet is dispatched. If there are SOF interrupts
happening during the data acquisiton it is no longer interupted and
only send out the next ISO packet once it has comleted its job.
Also now the USBDUXSIGMA has now plenty of time to deal with other
interrupts between ADC data readouts so that for example the DIO
can now be handled much quicker.
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
Removed the as31 download instructions. My patches have been
integrated into the official as31 release which now also allows
including files. So the standard as31 is fine.
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Signed-off-by: Bernd Porr <mail@berndporr.me.uk>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
After enabling asymmetric key encryption in qat driver an update to existing
firmware is required plus a new Modular Math Processor(MMP) firmware.
This has dependency on these commits:
commit f3dd7e60d2028b8391dea7a3b214e3083dadf6d6
commit 28cfaf67e5c1f5b6b0d549eea398f8401a40e566
commit a990532023b903b10cf14736241cdd138e4bc92c
Signed-off-by: Xiaoyan Bo <xiaoyan.bo@intel.com>
Signed-off-by: Gokhan Simsek <gokhan.simsek@intel.com>
Signed-off-by: Tadeusz Struk <tadeusz.struk@intel.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
The RTL8723A file previously submitted was mixed up by accident,
it was the same as the RTL8761A firmware.
Here is the correct RTL8723A firmware, tested by Sjoerd Simons.
Signed-off-by: Kyle McMartin <kyle@kernel.org>
The new FW will allow us to utilize some new features in our driver,
mainly adding vlan stripping offload and vxlan offload support.
In addition, this fixes several issues:
- Packets from a VF with pvid configured which were sent with a
different vlan were transmitted instead of being discarded.
- FCoE traffic might not recover after a failue while there's traffic
to another function.
Signed-off-by: Yuval Mintz <Yuval.Mintz@qlogic.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
This updates the firmware for BSW platform, which includes the fixes for BSW
power management.
The firmware version is also added to WHENCE file. The version is
v01.0B.02.01.
The md5sum of the file is cf8caa8d33e95744f25adcab1373daff
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
Latest firmware files supporting QCA61x4 ROME family chipset
Signed-off-by: Ben Young Tae Kim <ytkim@qca.qualcomm.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
The atusb kernel driver is sitting in the bluetooth-next tree waiting for the
merge window to open. It's scheduled for 4.2.
Flashing goes into permanent storage and the GPLv2+ firmware allows for further
explorations. See ChangeLog for more details and links.
Signed-off-by: Stefan Schmidt <stefan@datenfreihafen.org>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
Firmware licenses on linux-firmware should include an implicit
or explicit patent grant to end users for full device operation
otherwise it would start making linux-firmware useless for many
Linux distributions which have positions against patent encumbered
software [0] [1] [2] and it would mean cherry picking firmware files
out. It can also mean making it problematic to redistribute linux-firmware
in some jurisdictions which could have different positions on
patents, or have already outlawed software patents.
Licenses with implicit patent grants are allowed given that otherwise
we couldn't carry permissively licensed firmwares which would be silly,
but using permissively licensed firmware files which remove patent
grants explicitly are not allowed.
A clarifications is needed as one attempt was already made to include
firmware encumbered by patents without a grant [3] and it was decided
we would not allow these. We clarify this to make this requirement
explicit and prevent these type of further attempts.
[0] https://www.debian.org/legal/patent
[1] http://fedoraproject.org/wiki/Software_Patents#Red_Hat.27s_position_on_Software_Patents
[2] http://www.openinventionnetwork.com/about-us/
[3] https://lkml.org/lkml/2014/3/14/182
Cc: netdev@vger.kernel.org
Cc: linux-wireless@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Luis R. Rodriguez <mcgrof@suse.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
This is the firmware for the VCE (video encoding engine)
block in SI and TN/RL asics.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Kyle McMartin <kyle@kernel.org>
Following additions:
1. No changes to the FW program itself
2. CSS header size field was fixed
3. DMCheader length field is mentioned in dwords instead of bytes
4. Date field is fixed in header.
4. Fixed the DMC Header.HeaderLen issue. The HeaderLen is specified in bytes instead of dwords.
6. DC 5 and 6 count locations are in the below mentioned offsets - same as ver1.16
DC3_DC5_COUNT 80030
DC5_DC6_COUNT 8002C
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
This firmware also supports 3165.
This is the first firmware release for 8000.
Version number: 25.30.13.0
Revision number: 183742
Build number: WFFW14681
Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com>
Following additions:
1. The DE_RRMR and DE_GUCRMR register bits are set before the restore of
the registers to mask the flip done, etc. Once all the registers are
restored, these registers are restored.
2. The pipe interrupt registers are restored only after the plane has
been enabled.
3. Naming of the file changed from .5 to .16 to make it two decimal
points for increased number of versions that can be supported.
4. DC 5 and 6 count locations are in the below mentioned offsets
DC3_DC5_COUNT 80030
DC5_DC6_COUNT 8002C
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
DMC provides additional graphics low-power idle states. It provides
capability to save and restore display registers across these
low-power states independently from the OS/Kernel.
This is the first release of DMC firmware for Broxton platforms.
bxt_dmc_ver1.bin is a symbolik link to latest recommended minor
release.
This major version will be just upgraded on code when it is required
software changes for API/ABI compatibility.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
GuC is designed to perform graphics workload scheduling on the various
graphics parallel engines. In this scheduling model, host software
submits work through one of the 256 graphics doorbells and this invokes
the scheduling operation on the appropriate graphics engine. Scheduling
operations include determining which workload to run next, submitting a
workload to a command streamer, pre-empting existing workloads running
on an engine, monitoring progress and notifying host SW when work is
done.
This is the first release of GuC firmware for Skylake platforms.
skl_guc_ver1.bin is a symbolik link to latest recommended minor release.
This major version will be just upgraded on code when it is required
software changes for API/ABI compatibility.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
DMC provides additional graphics low-power idle states. It provides
capability to save and restore display registers across these low-power
states independently from the OS/Kernel.
This is the first release of DMC firmware for Skylake platforms.
skl_dmc_ver1.bin is a symbolik link to latest recommended minor release.
This major version will be just upgraded on code when it is required
software changes for API/ABI compatibility.
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Murali Karicheri