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From: Bernd Porr <BerndPorr@f2s.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>main
Bernd Porr
16 years ago
committed by
Greg Kroah-Hartman
5 changed files with 1929 additions and 0 deletions
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# (c) Bernd Porr |
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# GNU public license |
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# no warranty |
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# |
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all: as31 usbduxfast_firmware.bin usbdux_firmware.bin |
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as31: |
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make -C as31-2.1 |
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usbduxfast_firmware.bin: fx2-include.asm usbduxfast_firmware.asm as31 |
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as31-2.1/as31 -Fbin usbduxfast_firmware.asm |
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usbdux_firmware.bin: fx2-include.asm usbdux_firmware.asm as31 |
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as31-2.1/as31 -Fbin usbdux_firmware.asm |
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clean: |
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rm -f *.bin *~ *.lst *.bin |
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make -C as31-2.1 clean |
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To compile the firmware for the USBDUX and USBDUXfast |
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----------------------------------------------------- |
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Download the as31 from: |
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http://www.berndporr.me.uk/as31/ |
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(this is a patched version of as31 which supports an |
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include directive). |
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Install it in this directory. |
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Then run "make -f Makefile_dux". |
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Feedback: |
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BerndPorr@f2s.com |
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; rev 0.9 |
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; (c) Bernd Porr, Bernd.Porr@cn.stir.ac.uk |
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; GPL, GNU public license |
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; |
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; This program is free software; you can redistribute it and/or modify |
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; it under the terms of the GNU General Public License as published by |
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; the Free Software Foundation; either version 2 of the License, or |
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; (at your option) any later version. |
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; |
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; This program is distributed in the hope that it will be useful, |
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; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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; GNU General Public License for more details. |
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; |
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; You should have received a copy of the GNU General Public License |
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; along with this program; if not, write to the Free Software |
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; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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; |
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; In conjunction with the as31. |
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; Include-file for the FX2 by Cypress. The rest of the regs is defined |
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; by the as31 itself. |
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; |
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; from the TRM of the FX2: |
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; |
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;; CPU control |
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.equ CPUCS,0E600H |
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.equ REVCTL,0E60BH |
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;; interface config |
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.equ IFCONFIG,0E601H |
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.equ FIFORESET,0E604H |
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;; Endpoint configs |
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.equ EP1OUTCFG,0E610H |
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.equ EP1INCFG,0E611H |
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.equ EP2CFG,0E612H |
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.equ EP4CFG,0E613H |
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.equ EP6CFG,0E614H |
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.equ EP8CFG,0E615H |
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;; packets per frame, always one for USB 1.1 |
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.equ EP2ISOINPKTS,0E640H |
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.equ EP4ISOINPKTS,0E641H |
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.equ EP6ISOINPKTS,0E642H |
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.equ EP8ISOINPKTS,0E643H |
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;; endpoint byte counts |
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.equ EP1OUTBC,0E68DH |
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.equ EP1INBC,0E68FH |
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.equ EP1INCS,0E6A2H |
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.equ EP2BCH,0E690H |
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.equ EP2BCL,0E691H |
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.equ EP4BCH,0E694H |
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.equ EP4BCL,0E695H |
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.equ EP6BCH,0E698H |
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.equ EP6BCL,0E699H |
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.equ EP8BCH,0E69CH |
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.equ EP8BCL,0E69DH |
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;; |
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.equ EP4AUTOINLENH,0E622H |
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.equ EP4AUTOINLENL,0E623H |
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.equ EP6AUTOINLENH,0E624H |
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.equ EP6AUTOINLENL,0E625H |
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.equ EP2FIFOCFG,0E618H |
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.equ EP4FIFOCFG,0E619H |
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.equ EP6FIFOCFG,0E61AH |
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.equ EP8FIFOCFG,0E61BH |
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;; |
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.equ INPKTEND,0E648H |
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.equ GPIFCTLCFG,0E6C3H |
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.equ GPIFABORT,0E6F5H |
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.equ GPIFIDLECTL,0E6C2H |
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.equ GPIFWFSELECT,0E6C0H |
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.equ GPIFREADYCFG,0E6F3H |
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.equ GPIFIDLECS,0E6C1H |
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.equ EP6GPIFFLGSEL,0E6E2H |
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.equ EP6GPIFPDFSTOP,0E6E3H |
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.equ EP6GPIFTRIG,0E6E4H |
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.equ GPIFIE,0E660H |
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.equ GPIFIRQ,0E661H |
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;; |
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;; endpoint control |
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.equ EP2CS,0E6A3H |
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.equ EP4CS,0E6A4H |
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.equ EP6CS,0E6A5H |
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.equ EP8CS,0E6A6H |
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;; endpoint buffers |
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.equ EP2FIFOBUF,0F000H |
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.equ EP4FIFOBUF,0F400H |
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.equ EP6FIFOBUF,0F800H |
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.equ EP8FIFOBUF,0FC00H |
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;; IRQ enable for bulk NAK |
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.equ IBNIE,0E658H |
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;; interrupt requ for NAK |
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.equ IBNIRQ,0E659H |
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;; USB INT enables |
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.equ USBIE,0E65CH |
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;; USB interrupt request |
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.equ USBIRQ,0E65DH |
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;; endpoint IRQ enable |
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.equ EPIE,0E65EH |
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;; endpoint IRQ requests |
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.equ EPIRQ,0E65FH |
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;; USB error IRQ requests |
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.equ USBERRIE,0E662H |
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;; USB error IRQ request |
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.equ USBERRIRQ,0E663H |
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;; USB interrupt 2 autovector |
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.equ INT2IVEC,0E666H |
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;; autovector enable |
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.equ INTSETUP,0E668H |
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;; port cfg |
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.equ PORTACFG,0E670H |
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.equ PORTCCFG,0E671H |
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.equ PORTECFG,0E672H |
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;; I2C bus |
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.equ I2CS,0E678H |
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.equ I2DAT,0E679H |
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.equ I2CTL,0E67AH |
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;; auto pointers, read/write is directed to the pointed address |
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.equ XAUTODAT1,0E67BH |
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.equ XAUTODAT2,0E67CH |
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;; USB-control |
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.equ USBCS,0E680H |
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;; force packet end |
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.equ OUTPKTEND,0E649H |
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.equ IOA,80H |
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.equ DPL1,84H |
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.equ DPH1,85H |
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.equ DPS,86H |
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.equ CKCON,8Eh |
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.equ IOB,90H |
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.equ EXIF,91h |
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.equ MPAGE,92h |
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.equ AUTOPTRH1,9AH |
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.equ AUTOPTRL1,9BH |
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.equ AUTOPTRH2,9DH |
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.equ AUTOPTRL2,9EH |
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.equ IOC,0A0H |
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.equ INT2CLR,0A1H |
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.equ INT4CLR,0A2H |
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.equ EP2468STAT,0AAH |
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.equ EP24FIFOFLGS,0ABH |
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.equ EP68FIFOFLGS,0ACH |
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.equ AUTOPTRSETUP,0AFH |
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.equ IOD,0B0H |
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.equ IOE,0B1H |
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.equ OEA,0B2H |
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.equ OEB,0B3H |
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.equ OEC,0B4H |
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.equ OED,0B5H |
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.equ OEE,0B6H |
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.equ GPIFTRIG,0BBH |
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.equ EIE,0E8h |
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.equ EIP,0F8h |
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;; GPIF |
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.equ GPIFTCB3,0E6CEH |
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.equ GPIFTCB2,0E6CFH |
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.equ GPIFTCB1,0E6D0H |
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.equ GPIFTCB0,0E6D1H |
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.equ EP4GPIFFLGSEL,0E6DAH |
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.equ EP4GPIFPFSTOP,0E6DBH |
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;;; end of file |
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; usbduxfast_firmware.asm |
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; Copyright (C) 2004,2009 Bernd Porr, Bernd.Porr@f2s.com |
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; |
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; This program is free software; you can redistribute it and/or modify |
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; it under the terms of the GNU General Public License as published by |
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; the Free Software Foundation; either version 2 of the License, or |
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; (at your option) any later version. |
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; |
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; This program is distributed in the hope that it will be useful, |
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; but WITHOUT ANY WARRANTY; without even the implied warranty of |
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; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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; GNU General Public License for more details. |
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; |
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; You should have received a copy of the GNU General Public License |
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; along with this program; if not, write to the Free Software |
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; Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
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; |
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; |
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; Firmware: usbduxfast_firmware.asm for usbdux.c |
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; Description: Firmware for usbduxfast |
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; Devices: [ITL] USB-DUX (usbdux.o) |
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; Author: Bernd Porr <Bernd.Porr@f2s.com> |
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; Updated: 17 Apr 2009 |
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; Status: stable |
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; |
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;;; |
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;;; |
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;;; |
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.inc fx2-include.asm |
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.equ WFLOADED,70H ; waveform is loaded |
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.org 0000h ; after reset the processor starts here |
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ljmp main ; jump to the main loop |
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.org 0043h ; the IRQ2-vector |
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ljmp jmptbl ; irq service-routine |
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.org 0100h ; start of the jump table |
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jmptbl: ljmp sudav_isr |
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nop |
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ljmp sof_isr |
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nop |
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ljmp sutok_isr |
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nop |
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ljmp suspend_isr |
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nop |
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ljmp usbreset_isr |
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nop |
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ljmp hispeed_isr |
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nop |
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ljmp ep0ack_isr |
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nop |
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ljmp spare_isr |
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nop |
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ljmp ep0in_isr |
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nop |
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ljmp ep0out_isr |
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nop |
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ljmp ep1in_isr |
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nop |
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ljmp ep1out_isr |
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nop |
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ljmp ep2_isr |
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nop |
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ljmp ep4_isr |
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nop |
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ljmp ep6_isr |
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nop |
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ljmp ep8_isr |
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nop |
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ljmp ibn_isr |
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nop |
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ljmp spare_isr |
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nop |
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ljmp ep0ping_isr |
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nop |
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ljmp ep1ping_isr |
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nop |
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ljmp ep2ping_isr |
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nop |
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ljmp ep4ping_isr |
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nop |
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ljmp ep6ping_isr |
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nop |
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ljmp ep8ping_isr |
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nop |
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ljmp errlimit_isr |
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nop |
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ljmp spare_isr |
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nop |
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ljmp spare_isr |
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nop |
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ljmp spare_isr |
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nop |
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ljmp ep2isoerr_isr |
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nop |
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ljmp ep4isoerr_isr |
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nop |
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ljmp ep6isoerr_isr |
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nop |
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ljmp ep8isoerr_isr |
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;; dummy isr |
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sof_isr: |
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sudav_isr: |
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sutok_isr: |
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suspend_isr: |
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usbreset_isr: |
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hispeed_isr: |
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ep0ack_isr: |
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spare_isr: |
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ep0in_isr: |
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ep0out_isr: |
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ep1out_isr: |
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ep1in_isr: |
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ibn_isr: |
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ep0ping_isr: |
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ep1ping_isr: |
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ep2ping_isr: |
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ep4ping_isr: |
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ep6ping_isr: |
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ep8ping_isr: |
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errlimit_isr: |
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ep2isoerr_isr: |
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ep4isoerr_isr: |
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ep6isoerr_isr: |
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ep8isoerr_isr: |
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ep6_isr: |
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ep2_isr: |
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ep8_isr: |
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push dps |
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push dpl |
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push dph |
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push dpl1 |
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push dph1 |
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push acc |
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push psw |
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;; clear the USB2 irq bit and return |
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mov a,EXIF |
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clr acc.4 |
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mov EXIF,a |
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pop psw |
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pop acc |
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pop dph1 |
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pop dpl1 |
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pop dph |
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pop dpl |
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pop dps |
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reti |
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;;; main program |
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;;; basically only initialises the processor and |
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;;; then engages in an endless loop |
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main: |
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mov dptr,#REVCTL |
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mov a,#00000011b ; allows skip |
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lcall syncdelaywr |
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mov DPTR,#CPUCS ; CPU control register |
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mov a,#00010000b ; 48Mhz |
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lcall syncdelaywr |
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mov dptr,#IFCONFIG ; switch on IFCLK signal |
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mov a,#10100010b ; gpif, 30MHz |
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lcall syncdelaywr |
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mov dptr,#FIFORESET |
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mov a,#80h |
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lcall syncdelaywr |
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mov a,#8 |
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lcall syncdelaywr |
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mov a,#2 |
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lcall syncdelaywr |
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mov a,#4 |
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lcall syncdelaywr |
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mov a,#6 |
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lcall syncdelaywr |
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mov a,#0 |
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lcall syncdelaywr |
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mov dptr,#INTSETUP ; IRQ setup register |
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mov a,#08h ; enable autovector |
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lcall syncdelaywr |
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lcall initeps ; init the isochronous data-transfer |
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lcall initGPIF |
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;;; main loop |
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mloop2: |
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lcall gpif_run |
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sjmp mloop2 ; do nothing. The rest is done by the IRQs |
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gpif_run: |
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mov a,WFLOADED |
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jz no_trig ; do not trigger |
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mov a,GPIFTRIG ; GPIF status |
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anl a,#80h ; done bit |
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jz no_trig ; GPIF busy |
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;;; gpif has stopped |
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mov a,#06h ; RD,EP6 |
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mov GPIFTRIG,a |
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no_trig: |
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ret |
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initGPIF: |
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mov DPTR,#EP6CFG ; BLK data from here to the host |
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mov a,#11100000b ; Valid, quad buffering |
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lcall syncdelaywr ; write |
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mov dptr,#EP6FIFOCFG |
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mov a,#00001001b ; autoin, wordwide |
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lcall syncdelaywr |
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mov dptr,#EP6AUTOINLENH |
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mov a,#00000010b ; 512 bytes |
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lcall syncdelaywr ; write |
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mov dptr,#EP6AUTOINLENL |
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mov a,#00000000b ; 0 |
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lcall syncdelaywr ; write |
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mov dptr,#GPIFWFSELECT |
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mov a,#11111100b ; waveform 0 for FIFO RD |
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lcall syncdelaywr |
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mov dptr,#GPIFCTLCFG |
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mov a,#10000000b ; tri state for CTRL |
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lcall syncdelaywr |
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mov dptr,#GPIFIDLECTL |
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mov a,#11111111b ; all CTL outputs high |
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lcall syncdelaywr |
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mov a,#11111101b ; reset counter |
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lcall syncdelaywr |
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mov a,#11111111b ; reset to high again |
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lcall syncdelaywr |
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mov a,#00000010b ; abort when full |
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mov dptr,#EP6GPIFFLGSEL |
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lcall syncdelaywr |
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mov a,#00000001b ; stop when buffer overfl |
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mov dptr,#EP6GPIFPDFSTOP |
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lcall syncdelaywr |
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mov a,#0 |
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mov dptr,#GPIFREADYCFG |
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lcall syncdelaywr |
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mov a,#0 |
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mov dptr,#GPIFIDLECS |
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lcall syncdelaywr |
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; waveform 1 |
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; this is a dummy waveform which is used |
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; during the upload of another waveform into |
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; wavefrom 0 |
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; it branches directly into the IDLE state |
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mov dptr,#0E420H |
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mov a,#00111111b ; branch to IDLE |
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lcall syncdelaywr |
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mov dptr,#0E428H ; opcode |
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mov a,#00000001b ; deceision point |
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lcall syncdelaywr |
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mov dptr,#0E430H |
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mov a,#0FFH ; output is high |
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lcall syncdelaywr |
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mov dptr,#0E438H |
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mov a,#0FFH ; logic function |
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lcall syncdelaywr |
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; signals that no waveform 0 is loaded so far |
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mov WFLOADED,#0 ; waveform flag |
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ret |
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;;; initilise the transfer |
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;;; It is assumed that the USB interface is in alternate setting 1 |
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initeps: |
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mov DPTR,#EP4CFG |
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mov a,#10100000b ; valid, bulk, out |
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lcall syncdelaywr |
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mov dptr,#EP4BCL ; "arm" it |
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mov a,#00h |
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lcall syncdelaywr ; wait until we can write again |
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lcall syncdelaywr ; wait |
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lcall syncdelaywr ; wait |
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mov DPTR,#EP8CFG |
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mov a,#0 ; disable EP8, it overlaps with EP6!! |
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lcall syncdelaywr |
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mov dptr,#EPIE ; interrupt enable |
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mov a,#00100000b ; enable irq for ep4 |
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lcall syncdelaywr ; do it |
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mov dptr,#EPIRQ ; clear IRQs |
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mov a,#00100100b |
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movx @dptr,a |
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mov DPTR,#USBIE ; USB int enable register |
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mov a,#0 ; SOF etc |
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movx @DPTR,a ; |
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mov DPTR,#GPIFIE ; GPIF int enable register |
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mov a,#0 ; done IRQ |
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movx @DPTR,a ; |
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mov EIE,#00000001b ; enable INT2 in the 8051's SFR |
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mov IE,#80h ; IE, enable all interrupts |
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ret |
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;;; interrupt-routine for ep4 |
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;;; receives the channel list and other commands |
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ep4_isr: |
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push dps |
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push dpl |
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push dph |
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push dpl1 |
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push dph1 |
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push acc |
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push psw |
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push 00h ; R0 |
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push 01h ; R1 |
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push 02h ; R2 |
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push 03h ; R3 |
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push 04h ; R4 |
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push 05h ; R5 |
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push 06h ; R6 |
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push 07h ; R7 |
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mov dptr,#0f400h ; FIFO buffer of EP4 |
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movx a,@dptr ; get the first byte |
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mov dptr,#ep4_jmp ; jump table for the different functions |
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rl a ; multiply by 2: sizeof sjmp |
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jmp @a+dptr ; jump to the jump table |
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ep4_jmp: |
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sjmp storewaveform ; a=0 |
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sjmp init_ep6 ; a=1 |
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init_ep6: |
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; stop ep6 |
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; just now do nothing |
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ljmp over_wf |
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storewaveform: |
||||
mov WFLOADED,#0 ; waveform flag |
||||
|
||||
mov dptr,#EP6FIFOCFG |
||||
mov a,#00000000b ; |
||||
lcall syncdelaywr |
||||
|
||||
mov dptr,#GPIFABORT |
||||
mov a,#0ffh ; abort all transfers |
||||
lcall syncdelaywr |
||||
|
||||
wait_f_abort: |
||||
mov a,GPIFTRIG ; GPIF status |
||||
anl a,#80h ; done bit |
||||
jz wait_f_abort ; GPIF busy |
||||
|
||||
mov dptr,#GPIFWFSELECT |
||||
mov a,#11111101b ; select dummy waveform |
||||
movx @dptr,a |
||||
lcall syncdelay |
||||
|
||||
mov dptr,#FIFORESET |
||||
mov a,#80h ; NAK |
||||
lcall syncdelaywr |
||||
mov a,#6 ; reset EP6 |
||||
lcall syncdelaywr |
||||
mov a,#0 ; normal op |
||||
lcall syncdelaywr |
||||
|
||||
; change to dummy waveform 1 |
||||
mov a,#06h ; RD,EP6 |
||||
mov GPIFTRIG,a |
||||
|
||||
; wait a bit |
||||
mov r2,255 |
||||
loopx: |
||||
djnz r2,loopx |
||||
|
||||
; abort waveform if not already so |
||||
mov dptr,#GPIFABORT |
||||
mov a,#0ffh ; abort all transfers |
||||
lcall syncdelaywr |
||||
|
||||
; wait again |
||||
mov r2,255 |
||||
loopx2: |
||||
djnz r2,loopx2 |
||||
|
||||
; check for DONE |
||||
wait_f_abort2: |
||||
mov a,GPIFTRIG ; GPIF status |
||||
anl a,#80h ; done bit |
||||
jz wait_f_abort2 ; GPIF busy |
||||
|
||||
; upload the new waveform into waveform 0 |
||||
mov AUTOPTRH2,#0E4H ; XDATA0H |
||||
lcall syncdelay |
||||
mov AUTOPTRL2,#00H ; XDATA0L |
||||
lcall syncdelay |
||||
|
||||
mov AUTOPTRH1,#0F4H ; EP4 high |
||||
lcall syncdelay |
||||
mov AUTOPTRL1,#01H ; EP4 low |
||||
lcall syncdelay |
||||
|
||||
mov AUTOPTRSETUP,#7 ; autoinc and enable |
||||
lcall syncdelay |
||||
|
||||
mov r2,#20H ; 32 bytes to transfer |
||||
|
||||
wavetr: |
||||
mov dptr,#XAUTODAT1 |
||||
movx a,@dptr |
||||
lcall syncdelay |
||||
mov dptr,#XAUTODAT2 |
||||
movx @dptr,a |
||||
lcall syncdelay |
||||
djnz r2,wavetr |
||||
|
||||
mov dptr,#EP6FIFOCFG |
||||
mov a,#00001001b ; autoin, wordwide |
||||
lcall syncdelaywr |
||||
|
||||
mov dptr,#GPIFWFSELECT |
||||
mov a,#11111100b |
||||
movx @dptr,a |
||||
lcall syncdelay |
||||
|
||||
mov dptr,#FIFORESET |
||||
mov a,#80h ; NAK |
||||
lcall syncdelaywr |
||||
mov a,#6 ; reset EP6 |
||||
lcall syncdelaywr |
||||
mov a,#0 ; normal op |
||||
lcall syncdelaywr |
||||
|
||||
mov dptr,#0E400H+10H; waveform 0: first CTL byte |
||||
movx a,@dptr ; get it |
||||
orl a,#11111011b ; force all bits to one except the range bit |
||||
mov dptr,#GPIFIDLECTL |
||||
lcall syncdelaywr |
||||
|
||||
mov WFLOADED,#1 ; waveform flag |
||||
|
||||
; do the common things here |
||||
over_wf: |
||||
mov dptr,#EP4BCL |
||||
mov a,#00h |
||||
movx @DPTR,a ; arm it |
||||
lcall syncdelay ; wait |
||||
movx @DPTR,a ; arm it |
||||
lcall syncdelay ; wait |
||||
|
||||
;; clear INT2 |
||||
mov a,EXIF ; FIRST clear the USB (INT2) interrupt request |
||||
clr acc.4 |
||||
mov EXIF,a ; Note: EXIF reg is not 8051 bit-addressable |
||||
|
||||
mov DPTR,#EPIRQ ; |
||||
mov a,#00100000b ; clear the ep4irq |
||||
movx @DPTR,a |
||||
|
||||
pop 07h |
||||
pop 06h |
||||
pop 05h |
||||
pop 04h ; R4 |
||||
pop 03h ; R3 |
||||
pop 02h ; R2 |
||||
pop 01h ; R1 |
||||
pop 00h ; R0 |
||||
pop psw |
||||
pop acc |
||||
pop dph1 |
||||
pop dpl1 |
||||
pop dph |
||||
pop dpl |
||||
pop dps |
||||
reti |
||||
|
||||
|
||||
;; need to delay every time the byte counters |
||||
;; for the EPs have been changed. |
||||
|
||||
syncdelay: |
||||
nop |
||||
nop |
||||
nop |
||||
nop |
||||
nop |
||||
nop |
||||
nop |
||||
nop |
||||
nop |
||||
ret |
||||
|
||||
|
||||
syncdelaywr: |
||||
lcall syncdelay |
||||
movx @dptr,a |
||||
ret |
||||
|
||||
|
||||
.End |
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in new issue